# Carry versus overflow

*Two flags for two ways of reading the same bits*

Carry-out signals that an unsigned addition result did not fit in the available bits, while overflow signals that a signed two's-complement result did not fit, so the identical adder output is judged by the carry flag when the numbers are unsigned and by the overflow flag when they are signed.

Group: Arithmetic
URL: https://digiwleea.wleeaf.dev/learn/carry-vs-overflow/

> **KEY:** The [overflow lesson](https://digiwleea.wleeaf.dev/learn/overflow/) introduced both flags. This short page is the decision guide: given an adder result, **which flag do you read?** The answer is entirely about how you *meant* the numbers, because the adder itself does not know or care.

An adder produces the same output bits no matter how you interpret its inputs. What changes is which "did it fit?" test applies:

- If you meant the numbers as **unsigned** (`0` to `255` for 8 bits), read the **carry flag** `C`, the carry out of the top bit. `C = 1` means the true sum exceeded the unsigned range.
- If you meant the numbers as **signed** [two's complement](https://digiwleea.wleeaf.dev/learn/twos-complement/) (`-128` to `+127`), read the **overflow flag** `V`. `V = 1` means two same-sign inputs produced a wrong-sign result, so the signed answer did not fit.

The two flags are computed by different logic and are genuinely independent: any combination of `C` and `V` can occur. The hardware always computes both and lets the program test whichever matches the numbers it intended.

## Four cases on one addition

The clearest way to feel the split is to see additions where the two flags disagree:

| A + B (8-bit) | sum bits | C (unsigned) | V (signed) |
| --- | --- | --- | --- |
| 0100 0000 + 0100 0000 | 1000 0000 | 0 | 1 |
| 1000 0000 + 1000 0000 | 0000 0000 | 1 | 1 |
| 1111 1111 + 0000 0001 | 0000 0000 | 1 | 0 |
| 0000 0011 + 0000 0001 | 0000 0100 | 0 | 0 |

_Row 1 (64 + 64 = 128): fits unsigned (C=0) but overflows signed (+64 + +64 should be +128, out of -128..+127, V=1). Row 3 (255 + 1 unsigned = -1 + 1 signed): carries out (C=1) but the signed answer 0 is correct (V=0). Same adder, opposite verdicts._

> **WARN:** **Common mistakes.** Do not read carry as "signed overflow", nor overflow as "unsigned wrap". `64 + 64` sets `V` but not `C`; `255 + 1` sets `C` but not `V`. Also, a set carry is not automatically an error: for a multi-word add it is the value carried into the next word. Read the flag that matches the *interpretation* you chose for the numbers, and ignore the other.

How does the hardware get `V`? It is one [XOR](https://digiwleea.wleeaf.dev/learn/xor/) on two carries the adder already produces: `V = (carry into the top bit) XOR (carry out of the top bit)`. `C` is simply that carry out of the top bit. Both are cheap add-ons to the [8-bit adder](https://digiwleea.wleeaf.dev/learn/adder8/). The figure below is the adder/subtractor; set `SUB = 0` and watch `COUT` (the carry `C`) while checking the sign bit `S7` for signed overflow.

_Circuit diagram: The 8-bit adder/subtractor (ADDSUB8). Set SUB = 0 to add. Open it in the lab and try 0100 0000 + 0100 0000 (64 + 64): the sum S becomes 1000 0000 with COUT = 0, so no unsigned carry, but the sign bit flipped, the signed-overflow case. Then try 1111 1111 + 0000 0001 and watch COUT go to 1 while the signed result (0) is correct._

**Q (Try it):** Compute `0111 + 0001` in 4 bits. Is there a carry out, a signed overflow, or both?

**A:** `0111 + 0001 = 1000`. Unsigned: `7 + 1 = 8`, which fits in `0..15`, so there is **no carry out** (`C = 0`). Signed: `+7 + 1` should be `+8`, but `1000` reads as `-8` in 4-bit two's complement (range `-8..+7`), so two positives gave a negative: **signed overflow** (`V = 1`). Overflow but no carry.

### FAQ

**Q:** What is the difference between carry and overflow?

**A:** **Carry-out** (`C`) means an **unsigned** result did not fit (a `1` carried off the top bit). **Overflow** (`V`) means a **signed** two's-complement result did not fit (two same-sign inputs gave a wrong-sign result). They test the same adder bits under different interpretations and are independent.

**Q:** Which flag should I check after an addition?

**A:** Check the one that matches how you meant the numbers. If they are unsigned, read the carry flag `C`. If they are signed [two's complement](https://digiwleea.wleeaf.dev/learn/twos-complement/), read the overflow flag `V`. The other flag is meaningless for that interpretation.

**Q:** Can carry and overflow both be set at once?

**A:** Yes, all four combinations are possible. For example `1000 0000 + 1000 0000` (two negatives, `-128 + -128`) sets both `C = 1` and `V = 1`. The hardware computes each flag with its own logic, so they are fully independent.

> **KEY:** Carry and overflow join the [zero flag](https://digiwleea.wleeaf.dev/learn/alu/) as the status bits a CPU tests to make decisions. When you need to *widen* a value rather than detect that it did not fit, that is [sign extension](https://digiwleea.wleeaf.dev/learn/sign-extension/).