# The multiplexer

*Choosing a signal*

A multiplexer (mux) is a data selector: its select inputs choose which one of several data inputs is passed through to the single output. It is the switch that decides which source drives a wire or bus.

Group: Processor
URL: https://digiwleea.wleeaf.dev/learn/mux/

You met this block already, tucked inside the [register bit](https://digiwleea.wleeaf.dev/learn/regbit/): the part that chose between new data `D` and the held value `Q`. Pulled out on its own it is called a **multiplexer**, or **mux**: a selector that takes several data inputs and one **select** input, and passes exactly one data input through to the output. It is how a CPU decides which value to put on the [bus](https://digiwleea.wleeaf.dev/learn/buses/), so it shows up everywhere from here on.

## The 2-to-1 mux

Start with two data inputs `A` and `B` and one select line `SEL`. The rule is simple: when `SEL = 1` the output is `A`; when `SEL = 0` the output is `B`. One control bit chooses between two data bits.

> **TIP:** Picture a set of **railway points**: two tracks (`A` and `B`) merge into one, and the lever (`SEL`) decides which incoming track the single outgoing track is connected to. The data just rides through; the control line throws the switch. A mux is that lever for signals.

| SEL | A | B | Y |
| --- | --- | --- | --- |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |

_When SEL = 0, Y follows B (look at the top four rows: Y equals B). When SEL = 1, Y follows A (bottom four rows: Y equals A)._

## Building it from gates

The logic is a sum of two guarded terms. Pass `A` through only when `SEL` is `1`, pass `B` through only when `SEL` is `0`, and OR the two results. Since `SEL` and `NOT SEL` are never both `1`, at most one term is live at a time, so the OR just forwards whichever one is active.

```
Y = (A AND SEL) OR (B AND NOT SEL)
```

1. Invert `SEL` with a [NOT](https://digiwleea.wleeaf.dev/learn/not/) to get `NOT SEL`.
2. [AND](https://digiwleea.wleeaf.dev/learn/and/) `A` with `SEL`: this is `A` when selected, else `0`.
3. AND `B` with `NOT SEL`: this is `B` when selected, else `0`.
4. [OR](https://digiwleea.wleeaf.dev/learn/or/) the two AND outputs. Exactly one can be nonzero, so `Y` is the chosen input.

_Circuit diagram: A 2-to-1 multiplexer (MUX2) selecting A or B by SEL. This is the exact selector from the register bit, drawn on its own. Open it in the lab and flip SEL to watch the output switch between A and B._

## Wider muxes: choosing from four

To choose among **four** inputs `D0`-`D3` you need a 2-bit select `S1 S0`, because two bits count to four. The clean way is a small tree: one mux picks `D1` vs `D0`, a second picks `D3` vs `D2` (both steered by `S0`), and a third mux picks between those two results using `S1`. The output is `D` numbered by the binary value `S1 S0`. The same trick scales: eight inputs need a 3-bit select, sixteen need 4 bits.

**Q (Try it):** On the 4-input mux tree, you set the select to `S1 S0 = 10`. Which data input `D0`-`D3` reaches the output? And in general, how does the select code name the chosen input?

**A:** `S1 S0 = 10` is binary for `2`, so the output is `D2`. In general the 2-bit select read as a binary number is the **index** of the chosen input: `00 -> D0`, `01 -> D1`, `10 -> D2`, `11 -> D3`. An n-bit select picks one of `2^n` inputs by its number.

> **TIP:** To select a whole **byte** instead of a single bit, use eight muxes in parallel, all sharing the same `SEL` line, one per bit position. That is a bus-wide 2-to-1 mux: it routes one of two 8-bit buses onto the output, which is exactly how a CPU points its [bus](https://digiwleea.wleeaf.dev/learn/buses/) at one source or another.

> **KEY:** A mux **chooses** a value. Its mirror image **routes** a value to one of several places, and its close cousin **selects one line out of many** from an address. That addressing block is the [decoder](https://digiwleea.wleeaf.dev/learn/decoder/), and together the mux and decoder are how memory and registers get wired to a shared bus.

**Spot the fault** (Float (Z)): A=1, B=0, SEL=Z, Y=X. Look at SEL.

The select line was left unconnected, so it floats at `Z` instead of a clean `0` or `1`. With no definite select the mux cannot choose a branch and its output goes indeterminate (`X`). Drive `SEL` from a real signal (an input, a control line, or an [address bit](https://digiwleea.wleeaf.dev/learn/decoder/)); a mux is only as trustworthy as its select.

### FAQ

**Q:** What is a multiplexer?

**A:** A multiplexer (mux) is a data selector: its select inputs choose which one of several data inputs is passed through to the single output. It is the switch that decides which source drives a wire or [bus](https://digiwleea.wleeaf.dev/learn/buses/).

**Q:** How does a 2-to-1 multiplexer work?

**A:** It has two data inputs `A` and `B` and one select line `SEL`. The logic is `Y = (A AND SEL) OR (B AND NOT SEL)`: when `SEL = 1` the output is `A`, when `SEL = 0` it is `B`. Exactly one term is ever live, so the OR just forwards the chosen input.

**Q:** How many select bits does a multiplexer need?

**A:** To choose among `2^n` inputs you need an `n`-bit select. So 2 inputs need 1 select bit, 4 inputs need 2 bits, 8 inputs need 3 bits. The select read as a binary number is the index of the chosen input.

**Q:** What is the difference between a multiplexer and a decoder?

**A:** A multiplexer **chooses** one of many inputs and forwards it to a single output. A [decoder](https://digiwleea.wleeaf.dev/learn/decoder/) does the opposite addressing job: it takes a binary address and activates exactly one of many output lines. Mux is many-to-one, decoder is one-of-many.