# The program counter

*The register that points at the next instruction*

The program counter (PC) is a register that holds the memory address of the next instruction to fetch; it increments by one each instruction so the CPU walks through memory in order, and it can be loaded with a new address so a jump can redirect execution.

Group: Processor
URL: https://digiwleea.wleeaf.dev/learn/program-counter/

> **KEY:** You built the hardware in [the counter lesson](https://digiwleea.wleeaf.dev/learn/counter/), where the program counter is a synchronous up-counter with a load path. This page focuses on its **role** inside the running machine: it is the CPU's bookmark, the one register that answers "where am I in the program?".

A program is a list of [instructions](https://digiwleea.wleeaf.dev/learn/machine-code/) sitting in [memory](https://digiwleea.wleeaf.dev/learn/ram/) at consecutive addresses. To run them in order, the CPU must remember which address it is up to. That is the entire job of the **program counter** (PC): an [8-bit register](https://digiwleea.wleeaf.dev/learn/register8/) holding the address of the **next** instruction to fetch.

## Two operations, and only two

The PC supports exactly two things, chosen by a control line each cycle:

- **Increment** (`PC = PC + 1`): the normal case. After fetching the instruction at the current address, step to the next one. This is what makes the CPU run straight-line code in order.
- **Load** (`PC = target`): a jump. Instead of `+1`, write a new address into the PC so execution continues somewhere else. This is how loops, branches, and function calls work.

Because both write into the register's data input, a single control line picks count versus load, which is a [multiplexer](https://digiwleea.wleeaf.dev/learn/mux/) in front of the register's `D`. Our small teaching [CPU](https://digiwleea.wleeaf.dev/learn/cpu/) uses only increment (its instruction set has no jump), but the load path is what a fuller machine needs for control flow.

_Circuit diagram: An 8-bit program counter (PC8): a register that adds 1 to itself each clock. RST clears it to address 0; Q0-Q7 are the current instruction address. Before the first clock the outputs read Z; open it in the lab, pulse reset, then run the clock and watch the address climb 0, 1, 2, 3._

> **WARN:** **Common mistakes.** The PC holds an **address**, not the instruction itself (that is the [instruction register](https://digiwleea.wleeaf.dev/learn/instruction-register/)'s job). The PC is incremented **during fetch**, so by the time an instruction executes the PC already points at the *next* one, which is why a jump loads an absolute target rather than nudging the current value. And the PC must be [reset](https://digiwleea.wleeaf.dev/learn/reset-and-init/) to a known start address (usually 0) at power-up, or the CPU begins executing garbage.

**Q (Try it):** What two operations must a program counter support, and which one does a jump use?

**A:** **Increment** (`PC = PC + 1`), to advance to the next instruction in order, and **load** (`PC = target`), to set an arbitrary next address. A jump uses **load**: it writes the target address into the PC so the next fetch happens there instead of at the following instruction.

### FAQ

**Q:** What is a program counter?

**A:** A program counter (PC) is a register that holds the address of the next instruction to fetch. It increments each cycle so the CPU runs instructions in order, and it can be loaded with a new address to jump.

**Q:** What two operations does a program counter support?

**A:** **Increment** (`PC + 1`) to advance to the next instruction, and **load** to set a new address for a jump. A control line selects which one happens each cycle, effectively a [multiplexer](https://digiwleea.wleeaf.dev/learn/mux/) in front of the register input.

**Q:** What is the difference between a program counter and an instruction register?

**A:** The program counter holds *where* the next instruction is (an address) and increments each cycle. The [instruction register](https://digiwleea.wleeaf.dev/learn/instruction-register/) holds *what* the current instruction is (the byte fetched from that address) so the [control unit](https://digiwleea.wleeaf.dev/learn/control/) can decode it.

> **KEY:** The program counter is the first register touched every cycle: the [fetch phase](https://digiwleea.wleeaf.dev/learn/fetch-cycle/) reads the instruction at its address, then bumps it. Next, follow that fetch step by step.