# Virtual memory

*Giving each program its own address space*

Virtual memory gives each program its own large, private address space that hardware maps onto the smaller physical RAM through a page table, with a translation lookaside buffer (TLB) caching recent mappings, so programs address memory as if they owned it all.

Group: Processor
URL: https://digiwleea.wleeaf.dev/learn/virtual-memory/

The [RAM](https://digiwleea.wleeaf.dev/learn/ram/) you built has one flat set of physical addresses. On a real computer many programs run at once, and it would be chaos if they all reached into the same physical addresses directly (one program could clobber another, and each would have to know exactly where it was loaded). **Virtual memory** solves this by giving every program its own private range of addresses, the **virtual address space**, and having hardware translate those to real physical addresses on the fly.

## Pages and the page table

Memory is divided into fixed-size chunks called **pages** (commonly 4 KiB). Each program sees a tidy sequence of virtual pages; the operating system keeps a **page table** that records, for each virtual page, which physical page of [RAM](https://digiwleea.wleeaf.dev/learn/ram/) it currently occupies (or that it is out on disk). Every memory access goes through this translation: the CPU splits the virtual address into a page number and an offset, looks up the physical page in the table, and combines it with the offset to get the real address.

An analogy: a virtual address is like asking the front desk for "my room." Each guest thinks of "room 1," but the desk's ledger (the page table) maps each guest's "room 1" to a different real room in the building. Guests never collide because the desk translates every request.

## The TLB: caching translations

Looking up the page table in RAM on *every* access would be slow (it is itself a memory read). So the CPU keeps a small, fast [cache](https://digiwleea.wleeaf.dev/learn/cache/) of recent translations called the **translation lookaside buffer** (TLB). Most accesses hit the TLB and translate in one step; only a miss falls back to walking the page table. This is the same locality trick a data cache uses, applied to address translations.

> **WARN:** **Common mistakes.** Virtual memory is about **address translation and protection**, not simply "using disk as RAM" (that swapping is one feature it enables, not its definition). The page table translates *page numbers*, not whole addresses; the offset within a page passes through unchanged. And the TLB is a cache of *translations*, distinct from the data [cache](https://digiwleea.wleeaf.dev/learn/cache/) that holds actual bytes, though both exploit locality.

**Q (Try it):** What does a page table translate, and what does a TLB speed up?

**A:** A **page table** translates a **virtual page number** into a physical page number (the offset within the page is unchanged), giving each program its own address space mapped onto real [RAM](https://digiwleea.wleeaf.dev/learn/ram/). A **TLB** speeds up that translation: it is a small fast [cache](https://digiwleea.wleeaf.dev/learn/cache/) of recently used page-table entries, so a repeated access to the same page is translated in one step instead of re-reading the page table from memory.

### FAQ

**Q:** What is virtual memory?

**A:** Virtual memory gives each program its own large, private address space that hardware maps onto the smaller physical [RAM](https://digiwleea.wleeaf.dev/learn/ram/) through a page table. Programs address memory as if they owned it all, while the operating system decides where each virtual page really sits (in RAM or on disk).

**Q:** What does a page table do?

**A:** A page table records, for each virtual page of a program, which physical page of RAM it maps to (or that it is on disk). On each access the CPU translates the virtual page number to a physical one via the table, keeping the in-page offset unchanged.

**Q:** What is a TLB?

**A:** A translation lookaside buffer is a small, fast [cache](https://digiwleea.wleeaf.dev/learn/cache/) of recently used page-table entries. Because most memory accesses reuse the same few pages, the TLB translates them in one step and avoids re-walking the page table in RAM, making virtual memory fast.

> **KEY:** Virtual memory and [caches](https://digiwleea.wleeaf.dev/learn/cache/) both rest on the same insight: keep the hot data (or translations) close and fast, and let a larger, slower store back it. It is the [memory hierarchy](https://digiwleea.wleeaf.dev/learn/memory-hierarchy/) idea applied to address spaces.