Odd parity generator and checker: 4-bit circuit, live
An odd parity generator adds a parity bit P so that the data and P together always have an odd number of 1s; for 4 data bits, P = NOT (D3 XOR D2 XOR D1 XOR D0). The odd parity checker at the receiver XORs all five bits and flags an error E when the count of 1s comes out even.
Parity is the simplest error check: one extra bit makes the number of 1s in every word follow a rule, odd here, so any single flipped bit breaks the rule and is detected. The generator is an XOR tree, which computes whether the data has an odd number of 1s, followed by an inversion: if the data already has an odd count, P = 0; if even, P = 1. The checker XORs the four received data bits with the received parity bit Pin: in a good word that is 1 (odd), so E = NOT of it is 0, and any single-bit error makes E = 1. Two flipped bits cancel out and go unnoticed, which is why stronger codes such as the Hamming code exist. Odd parity is the mirror of the even parity generator and checker: same XOR tree, one inversion more. One reason to choose odd parity is that an all-zero word, such as a dead line, then fails the check.
Open this circuit in the lab →
What you need
- 3× XOR: the parity tree: (D3 XOR D2) XOR (D1 XOR D0)
- 1× XNOR: P = NOT (D3 XOR D2 XOR D1 XOR D0)
- 1× XNOR: E = NOT (data parity XOR Pin): 1 when the received count is even
Step by step
- Place inputs
D3toD0andPin, and probesPandE. - XOR D3 with D2 and D1 with D0, then XOR the two results: that is 1 when the data has an odd number of 1s.
- Generator: P is the XNOR of the two pair results, the inverse of the data parity.
- Checker: E is the XNOR of the data parity and Pin. Set Pin = P (a good word) and E = 0; flip any one bit and E becomes 1.
Odd parity examples
| Data D3..D0 | 1s in data | P | 1s with P |
|---|---|---|---|
| 0000 | 0 | 1 | 1 |
| 0001 | 1 | 0 | 1 |
| 0011 | 2 | 1 | 3 |
| 0111 | 3 | 0 | 3 |
| 1111 | 4 | 1 | 5 |
| 1010 | 2 | 1 | 3 |
With P added, every word has an odd number of 1s. All 32 combinations of D3..D0 and Pin are checked for both P and E before the page is built.
You can also read the full theory in the lesson on error detection and correction. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
More builds: Selecting, routing and decoding
All 246 build guides, by topic
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the Odd parity generator and checker in the lab →Frequently asked
What is an odd parity generator?
A circuit that adds a parity bit to data so that the total number of 1s, data plus parity, is odd. For 4 data bits, P = NOT (D3 XOR D2 XOR D1 XOR D0).
What is the difference between odd and even parity?
Even parity makes the total number of 1s even; odd parity makes it odd. The circuits differ by one inversion: even parity P is the XOR of the data bits, odd parity P is its complement.
How does an odd parity checker detect errors?
It XORs all received bits, data and parity. In a correct odd-parity word the result is 1; if it comes out 0, an odd number of bits (usually one) was flipped, so the checker raises its error output.
Can parity detect two-bit errors?
No. Two flipped bits leave the count's oddness unchanged, so parity misses them. Codes such as Hamming codes add more check bits to detect and correct more errors.