How a CPU works: from a single transistor to a running program
The whole chain, from a voltage-controlled switch up to fetch, decode, execute
A CPU works by reducing every operation to switches. Millions of transistors, each just a voltage-controlled switch, are wired into logic gates; gates combine into adders and memory cells; those compose into registers, an arithmetic unit, and RAM; and a control unit steps a clock through a fetch, decode, execute loop, reading instructions from memory and routing data through the right blocks to run a program. Nothing in the machine is smarter than a switch deciding whether current flows. The intelligence is entirely in how the switches are arranged.
It all starts with a switch: the transistor
Every part of a processor is built from one component: the transistor, a switch you control with a voltage. A small voltage on its control terminal (the gate) decides whether current can flow through the other two. There is nothing mysterious underneath the logic: a CPU is millions of these switches, and all of digital design is the art of arranging them. The scale is the only hard part: the first microprocessor, the 1971 Intel 4004, had about 2,300 transistors, while a 2025 chip like Apple's M3 Ultra packs 184 billion, each switching billions of times a second, yet every one is still just a switch you can understand. See one switch turn on, one level below the logic, in the interactive MOSFET simulator.
Two flavors do all the work in modern chips. An NMOS transistor conducts when its gate is driven high (
1); a PMOS conducts when its gate is driven low (0). They are perfect opposites, and that opposition is the trick the next layer depends on. A wire in these circuits is never just a vague voltage: it carries one of a few definite logic values, and reasoning about a circuit means tracking which value sits on each net.Switches become logic gates: CMOS and the universal NAND
Pair the two transistor types and you get a logic gate. The pattern, called CMOS, is a pull-up network of PMOS that can connect the output to power (
1) and a complementary pull-down network of NMOS that can connect it to ground (0). The two networks are exact opposites, so for any input exactly one is active: the output is always a clean 1 or 0, never floating and never shorted.The simplest gate is the inverter (NOT): one PMOS over one NMOS sharing an input, output the opposite of the input. Stack or parallel two transistors in each network and you get two-input gates. NAND outputs
0 only when both inputs are 1 (series pull-down, parallel pull-up); its mirror image NOR outputs 1 only when both inputs are 0. A single static CMOS gate is naturally inverting, so the friendly non-inverting gates are built by canceling that inversion: AND is a NAND followed by a NOT, and OR is a NOR followed by a NOT. Build and probe these gates from transistors yourself in the logic gate simulator, or click each gate's inputs and read its truth table in the interactive gate tour.One gate deserves special mention. NAND is universal: wire up enough NANDs and you can reproduce every other gate, and therefore any logic function at all. That is why real chips lean on it so heavily, and it is why a gate with no direct transistor recipe, XOR (output
1 exactly when the inputs differ), is built from a handful of NANDs. There is a general method here too, turning any truth table into a transistor network, covered in designing gates.The language underneath: binary, boolean algebra, truth tables
Gates manipulate bits, and a computer counts in binary: every number, instruction, and address is a pattern of
0s and 1s (click through it in the interactive binary guide, and see how the very same bits store negative numbers with two's complement). Because long binary strings are hard to read, they are usually written in hexadecimal, where each digit packs exactly four bits.The behavior of any gate or block is captured completely by a truth table: list every input combination and the output for each, and you have specified the function with no ambiguity left. Boolean algebra is the math of those
1s and 0s, the rules (including De Morgan's laws) that let you simplify an expression before you ever place a transistor, and a Karnaugh map is a visual way to find the smallest gate network for a given truth table. These are the tools that keep a design from ballooning into more switches than it needs.Gates become arithmetic: adders
The first useful thing gates compute is addition. Adding two single bits, the sum is
A XOR B and the carry is A AND B: those two gates side by side are a half adder. To chain additions across a multi-bit number you also need to fold in a carry coming in from the column to the right, which gives the full adder, three inputs (A, B, carry-in) producing a sum and a carry-out. Step through a binary addition column by column, watching the carry ripple left, in the interactive adder.Wire eight full adders in a row, each one's carry-out feeding the next one's carry-in, and you get an 8-bit adder that sums two whole bytes. With one more trick, two's complement (invert the bits and add one), the very same adder also subtracts. Addition and subtraction are the arithmetic core the processor will lean on, and multiplication follows as repeated shift-and-add, shown step by step in the interactive multiplier.
Circuits that remember: latches, flip-flops, registers
So far every output depends only on the current inputs. A computer needs to remember, and memory comes from feedback: route a gate's output back into its own input and the circuit can hold a value. Cross-couple two NOR gates and you get an SR latch, the first circuit that can store a single bit. Add a control input so it only changes when you allow it and you have a D latch; make it capture on a clock edge rather than a level and you have a D flip-flop, the standard one-bit storage cell. Watch a latch hold a bit through feedback, step by step, in the interactive memory simulator.
A flip-flop holds one bit. Put eight of them side by side, sharing a clock and a load line, and you have a register: a byte of storage that updates in lockstep on command. Registers are where a CPU keeps the values it is working on right now, and the single register bit is the cell they are built from.
Moving bytes around: buses, tri-state, multiplexers, decoders
Once there are several registers and an arithmetic unit, they need to share wires. A bus is a bundle of wires (one per bit) that many components read from and write to. But two outputs must never drive the same wire at once, so outputs that share a bus use tri-state buffers: a buffer can drive
0, drive 1, or switch to a high-impedance Z state that electrically lets go of the wire, so only the one enabled source is talking.Two more selection blocks finish the plumbing. A multiplexer (mux) is a data selector: several inputs, one output, and a select signal that chooses which input passes through. A decoder does the reverse kind of job, turning an N-bit binary code into one-of-many select lines, exactly what you need to pick which register to enable from its address. Together, buses, tri-state, muxes, and decoders are how data is routed from any block to any other.
The arithmetic logic unit (ALU)
Bundle the arithmetic and a few logic operations behind a single block with a function-select input and you have the ALU, the calculator at the heart of the CPU. Drive its function lines one way and it adds; another and it subtracts (the adder plus two's complement from before) or runs a bitwise AND or OR. It also reports status, most importantly whether the result was zero, a flag the control logic will test to make decisions.
The ALU is where most of the real computing happens. Everything else in the processor exists to feed it the right operands and to do something useful with its result.
Memory and instructions: RAM and machine code
A register holds a handful of bytes; a program needs far more. RAM is a grid of storage cells with an address bus to pick a location and a data bus to read or write it, so the CPU can store and recall many bytes by number. A counter, a register that increments on each clock, becomes the program counter that walks through memory addresses in order.
The bytes living in RAM are not just data, they are machine code: the instruction set, where each instruction is an opcode (what to do, such as LOAD, ADD, STORE, HALT) plus an operand (what to do it to, often a memory address). When the CPU fetches an instruction it parks it in the instruction register so the rest of the cycle can read the opcode and operand from a stable place.
The conductor: the control unit and fetch, decode, execute
Every block so far has control lines: load this register, enable that bus driver, set the ALU's function, tick the counter. The control unit is what asserts those lines in the right order. Driven by the clock, it runs the fetch, decode, execute loop: fetch the instruction at the address in the program counter, decode its opcode to decide which control lines to raise, then execute by routing data through the datapath (the registers, ALU, buses, and RAM wired together) so the operation actually happens, and advance the counter to the next instruction. A real processor spins this fetch, decode, execute loop billions of times a second; watch it slowed to a single step, running a small program, in the interactive CPU simulator.
Put the datapath and the control unit together and you have a working CPU: a small 8-bit processor built from nothing but the switches you started with. To see it actually run a program, the program trace lesson hand-executes a short LOAD, ADD, STORE, HALT sequence cycle by cycle.
A program, end to end
Picture a tiny program in RAM:
LOAD 20, ADD 21, STORE 22, HALT. On the first cycle the control unit fetches LOAD 20 (the byte at the address in the program counter), copies it into the instruction register, and decodes the opcode as LOAD; it raises the lines that read memory address 20 onto the bus and load that byte into the accumulator register, then bumps the counter. Next cycle it fetches ADD 21, reads address 21 onto the bus, and tells the ALU to add it to the accumulator, leaving the sum in place. Then STORE 22 drives the accumulator back onto the bus and writes it into RAM address 22. Finally HALT stops the clock. Every step is just registers loading, a bus carrying a byte, and the ALU adding, all choreographed by control lines, all of it ultimately transistors switching on and off.That is the whole machine. Each layer is a small, verifiable idea stacked on the one below: switch, gate, adder, latch, register, bus, ALU, memory, control. Understand each rung and the CPU stops being magic and becomes something you could build yourself, which is exactly what this course has you do.