The datapath
Hanging the blocks on a shared bus
The datapath is every storage and compute block wired onto one shared bus, each gated on by a control line, so data flows from a source, optionally through the ALU, into a destination, one transfer per clock step.
Builds onThe ALUAn 8-bit registerThe program counterMemory: RAMThe instruction registerTri-state buffers and the shared bus
You now hold every block of the machine: an ALU to compute, registers to store, a program counter to track position, RAM for program and data, and an instruction register. The datapath is how they are wired together: every block hangs off one shared bus, reads from it through its data input, and drives onto it through a tri-state buffer. Control lines decide, each step, who drives the bus and who loads from it.
One bus, many blocks, gated traffic
Picture a single 8-bit bus running across the chip. Each block taps it twice: its tri-state output can put a value on the bus (when its 'enable-out' control line is high), and its register input can load whatever is on the bus (when its 'load' control line is high). Because only one tri-state may drive the bus at a time, a data transfer is always 'one source enables out, one destination loads in', driven by a clock edge. That single-transfer-per-step discipline is the whole reason a CPU works in micro-steps.
- The accumulator (ACC): the main working register, one input of the ALU.
- The ALU: its result can be driven onto the bus; the zero flag feeds the control unit.
- The B register: holds the ALU's second operand.
- The program counter: drives the next address onto the bus, loads a jump target from it.
- RAM: reads the bus into the addressed cell, or drives that cell's value out.
- The instruction register: latches a fetched instruction; its opcode steers control.
The accumulator and ALU at the center
The busiest loop is the accumulator feeding the ALU. The accumulator's output is permanently wired to the ALU's
A input; the ALU's other input B comes off the bus; and the ALU's result feeds back into the accumulator. So 'add the value on the bus to the accumulator' is one step: select the ALU's add function and load the accumulator. The diagram below is exactly this core, the accumulator and ALU wired in a loop. Drive it over a few clocks and you can watch a value accumulate, which is most of what real programs do.ACCALU): an accumulator register wired into an ALU and back. F0/F1 choose add/subtract/AND/OR, B0-B7 is the operand, LD loads the result on a clock edge. (The full datapath hangs this plus the PC, RAM, B register, and IR on one shared tri-state bus; this figure is the central loop, the part that does the arithmetic.) Open it in the lab, hold LD high, and step a short sequence: clear, then add 5, then add 10, then subtract 15, watching ACC go 0, 5, 15, 0 and ZERO light up.Reading the full datapath is easier if you trace one transfer at a time: pick a source, follow its tri-state onto the bus, follow the bus to a destination's input, and note which control lines must be high. Every operation the CPU performs is a short list of such transfers. The bus never carries two things at once.
Try it
On the execute core, hold
LD = 1 and F1 F0 = 00 (add). Starting from ACC = 0, put 5 on B and clock, then 10 on B and clock. What is ACC? Now describe that second clock as a single bus transfer.Answer
After adding
5 then 10, ACC = 15. The second clock is one transfer: the operand 10 arrives on B, the ALU computes ACC + B = 5 + 10 = 15, and on the edge the accumulator loads that sum (ACC.load high). Source (memory/operand) to ALU to accumulator, one micro-step, exactly what a real ADD's execute phase does.The datapath is the body; it can do any single transfer you wire the control lines for. What it lacks is a will of its own: something to choose the transfers, in order, to carry out a program. Combine this datapath with the control unit sequencer and you get a machine that fetches and runs instructions on its own, a CPU.
Frequently asked
What is a datapath?
The datapath is every storage and compute block, the accumulator and ALU, the B register, the program counter, RAM, and the instruction register, wired onto one shared bus. Each block reads from the bus through its data input and drives onto it through a tri-state buffer; data flows from a source, optionally through the ALU, into a destination, one transfer per step.
Why can the datapath only do one transfer per step?
Because only one tri-state may drive the shared bus at a time. So every transfer is 'one source enables out, one destination loads in', committed on a clock edge. That single-transfer-per-step discipline is the whole reason a CPU works in micro-steps.
What is the difference between the datapath and the control unit?
The datapath is the body: the wired-together registers, ALU, and bus that data actually flows through. The control unit is the will: it drives the enable and load lines that decide, each step, who puts a value on the bus and who reads it. The datapath can do any transfer; the control unit chooses which, in order.
Why is the accumulator wired directly to the ALU?
The accumulator's output is permanently tied to the ALU's
A input, the ALU's B input comes off the bus, and the ALU's result feeds back into the accumulator. This makes 'add the value on the bus to the accumulator' a single step: select the ALU's add function and load the accumulator, which is most of what real programs do.Every lesson here builds toward one thing: a working CPU, from the transistor up.
Open the free lab →