NOR
NAND's mirror image
A NOR gate outputs 1 only when both inputs are 0. It is the topological mirror of NAND, with series PMOS pulling up and parallel NMOS pulling down, and like NAND it is universal.
Build it in the lab →You met NOR as the worked example in designing gates; now you build it. The fastest way to understand it is as NAND with its two networks swapped, so keep that gate in mind as you go.
NOR stands for NOT-OR: the output is
1 only when both inputs are 0. The instant either input goes 1, the output is pulled to 0. Like NAND, NOR is universal, and it has one special talent the others lack, which the SR latch will exploit to remember a bit.| A | B | F |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
1. Any high input drives the output low.F = ¬(A ∨ B)
The transistor network: series and parallel swapped
Place NOR next to NAND and the networks are simply exchanged. In NAND the PMOS pull-up is in parallel and the NMOS pull-down is in series. In NOR it is the opposite: PMOS in series, NMOS in parallel.
- Pull-up (series PMOS): both PMOS must conduct to charge the output to
1. A PMOS conducts on gate0, so bothAandBmust be0. Output is1only when both inputs are0. - Pull-down (parallel NMOS): either NMOS conducting discharges the output to
0. An NMOS conducts on gate1, so ifAorBis1, the output is pulled to0. - The two paths are complements: whenever the pull-down is off, the pull-up is on (and vice versa), so the output is always a definite
0or1.
Series pull-up = AND-like at the top; parallel pull-down = OR-like at the bottom. That is the exact swap from NAND (parallel up, series down). Once you can read those two shapes, you can read any CMOS gate at a glance.
VCC, two NMOS in parallel pulling down to GND. Open it in the lab and compare it side by side with your NAND.Check yourself
Without building it: for inputs
A = 0, B = 1, is the NOR output 0 or 1? Which network conducts? Then confirm against the truth table above.Answer
Build it in the lab ↗A = 0, B = 1 gives F = 0. The parallel NMOS pull-down conducts (the B = 1 NMOS turns on, dragging the output to GND), while the series PMOS pull-up is broken because B = 1 shuts its PMOS. Any 1 on either input pulls NOR low; only A = B = 0 gives 1.Building a whole circuit from NOR alone
Because NOR is universal, you can build an entire logic circuit from nothing but NOR, the same way chips build circuits from nothing but NAND. The recipe mirrors the NAND one exactly. Take an OR-AND circuit, a layer of OR gates feeding a single AND (the product-of-sums shape you will meet in canonical forms), and rewrite it by bubble pushing:
- Put an inversion bubble on the output of every first-level OR gate. An OR with an inverted output is a NOR, so each OR becomes a NOR.
- Put a matching bubble on every input of the final AND gate. An AND with inverted inputs computes
A'·B' = (A + B)', which is a NOR by De Morgan's law, so the AND becomes a NOR too. - Each wire between the two levels now carries two bubbles back to back, and two inversions cancel, so the function never changes. Same behavior, one gate type.
F = (A + B)(C + D) = NOR(NOR(A, B), NOR(C, D))
This is the exact mirror of NAND-NAND: an AND-OR (sum-of-products) circuit turns all-NAND by the same bubble-pushing move, with AND and OR swapped, just as the transistor networks are swapped. Canonical forms shows the full recipe for reading either one straight off a truth table.
Frequently asked
What is a NOR gate?
A NOR (NOT-OR) gate outputs
1 only when both inputs are 0. The instant either input goes 1, the output is pulled to 0.How do you build a NOR gate from transistors?
It is the NAND network with its two halves swapped: PMOS in series as the pull-up (output is
1 only when both inputs are 0) and NMOS in parallel as the pull-down (any input 1 drags the output to 0).Is NOR a universal gate?
Yes. Like NAND, NOR can build every other logic gate on its own, so any digital circuit can be made from NOR gates alone.
What is the difference between NOR and OR?
NOR is OR with the output inverted: NOR is
1 only when both inputs are 0, while OR is 1 whenever at least one input is 1. NOR equals NOT (A OR B).You've got the theory. Now build it from scratch and watch it work.
Build it in the lab →