XOR
The odd one out
An XOR (exclusive-OR) gate outputs 1 exactly when its two inputs differ. No single static CMOS gate computes it, so it is built from a small network of NAND gates, and it forms the core of binary addition.
Build it in the lab →This lesson leans entirely on NAND and its universality. XOR has no direct transistor recipe like the gates before it, so instead of running the design method you will *compose* four NANDs. It is your first taste of building a function that no single gate provides, which is most of what real logic design is.
XOR (exclusive OR) produces
1 when its two inputs are different, and 0 when they are the same. Another way to say it: the output is 1 exactly when an odd number of inputs are 1 (a parity check). Unlike AND, OR, NAND, and NOR, there is no single CMOS transistor pair that does XOR, so you combine simpler gates.| A | B | F |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
1 in the two rows where the inputs differ. The last row, both 1, gives 0, which is what distinguishes XOR from OR.F = A ⊕ B
Building XOR from four NAND gates
The classic four-NAND construction shares one intermediate signal
M = A NAND B, then combines it with each input. Walk the truth-table rows after each step to convince yourself it holds.- Compute
M = A NAND Bwith one NAND.Mis0only when both inputs are1; otherwise1. - Compute
P = A NAND Mwith a second NAND. WhenAis0,Pis1. WhenAis1andMis1(soBis0),Pis0. WhenAis1andMis0(both inputs1),Pis1. - Compute
Q = B NAND Mwith a third NAND. Symmetric toP, usingBinstead ofA. - Compute
F = P NAND Qwith the fourth NAND. Check: when the inputs differ, one ofP/Qis0, soFis1. When both are0, bothPandQare1, soFis0. When both are1,Mis0, so againPandQare1andFis0.
An alternative uses your saved parts directly:
F = (A OR B) AND (A NAND B), which reads naturally as "at least one input is 1, but not both." This simulator's level builds the four-NAND version, because it shows off NAND's universality.M, two combine each input with M, and a final NAND produces the output. Open it in the lab and toggle the inputs through all four rows.Do not confuse XOR with OR. They agree on three rows and differ on the last:
1 XOR 1 = 0 but 1 OR 1 = 1. XOR is "one or the other, but not both"; OR is "one or the other, or both." That single row is the whole difference, and it is what makes XOR the sum bit of an adder while OR is not.Try it
Use XOR as a controllable inverter. If one XOR input is a control line
C and the other is data D, what comes out when C = 0? When C = 1?Answer
D XOR 0 = D (passes through unchanged), and D XOR 1 = NOT D (inverted). So C decides whether D passes straight through or flipped. This is exactly the trick the adder uses to subtract: flip every bit of one operand on command.XOR is the heart of binary addition. Adding two single bits, the sum bit is
A XOR B and the carry bit is A AND B. The half adder in the next group is literally those two gates side by side, and a row of them becomes the adder in your CPU's ALU. Everything in the Arithmetic group follows from this gate.Because XOR detects when two signals differ, it also drives comparators, parity/error checks, and (flip its inputs) controllable inverters: feeding one XOR input a control line turns the other input through or inverted on command. That trick is exactly how your CPU's adder will subtract.
Spot the fault
A1B1F1
Look at F
Wrong logic level
For
A = 1, B = 1 a correct XOR outputs 0, since the inputs are the same, but this gate reads 1. It is computing OR, not XOR. The two functions agree on every row except this one: 1 XOR 1 = 0 while 1 OR 1 = 1.Frequently asked
What is an XOR gate?
An XOR (exclusive-OR) gate outputs
1 exactly when its two inputs differ, and 0 when they are the same. Equivalently, it outputs 1 when an odd number of inputs are 1 (a parity check).Why does XOR need multiple gates instead of one transistor pair?
No single static CMOS gate computes XOR, so it is built from a small network of simpler gates. A classic construction uses four NAND gates: one makes
M = A NAND B, two combine each input with M, and a fourth produces the output.What is the difference between XOR and OR?
They match on three input rows and differ on the last:
1 XOR 1 = 0 but 1 OR 1 = 1. XOR means "one or the other, but not both"; OR means "one or the other, or both." That single row is what makes XOR the sum bit of an adder.Why is XOR important for binary addition?
Adding two single bits, the sum bit is
A XOR B and the carry bit is A AND B. So the half adder is just an XOR and an AND, and a row of those becomes the adder in a CPU's ALU.You've got the theory. Now build it from scratch and watch it work.
Build it in the lab →