NOT
The inverter
A NOT gate, or inverter, outputs the opposite of its input: 0 becomes 1 and 1 becomes 0. It is the simplest CMOS gate, just one PMOS and one NMOS transistor working in opposition.
Builds onComplementary CMOS
Build it in the lab →This is the gate from Complementary CMOS, now built for real and saved as your first reusable part. It is the textbook complementary pair: one PMOS, one NMOS, the same input on both. If that lesson made sense, you already know why this works; here you wire it and keep it.
NOT is the inverter. Whatever you put in, you get the opposite out: feed it
0 and it returns 1, feed it 1 and it returns 0. It is the most fundamental gate in digital logic, and the first one you wire from raw transistors.| A | F |
|---|---|
| 0 | 1 |
| 1 | 0 |
F = ¬A
How two transistors make an inverter
A static CMOS inverter has exactly two transistors sharing one input
A and one output F. A PMOS sits on top, able to connect F to VCC (logic 1). An NMOS sits below, able to connect F to GND (logic 0). Both gates are tied together and driven by A.- When
Ais0: the PMOS gate sees0so it conducts; the NMOS gate sees0so it is off.Fis pulled toVCC, giving1. - When
Ais1: the NMOS gate sees1so it conducts; the PMOS gate sees1so it is off.Fis pulled toGND, giving0. - In every state exactly one transistor conducts, so there is never a short from
VCCtoGNDand never a floating output.
VCC, NMOS below pulling to GND, both gates sharing input A. Open it in the lab and toggle A.Try it
Predict the inverter's output for
A = 0, then build it in the lab (or open the figure above) and confirm. What feeds both transistor gates?Answer
A = 0 gives F = 1: the PMOS conducts and pulls F up to VCC. Both transistor gates are fed by the same input A; that shared connection is what makes it an inverter. Wire them to different signals and it is no longer a NOT.The NOT gate gets saved to your library the moment it passes. Every later lesson that needs an inverter reaches for this part instead of re-wiring two transistors. Composing saved blocks, not redrawing transistors, is how real chip design (and the rest of this course) works.
NOT shows up far beyond logic puzzles. To subtract in your CPU you will invert every bit of a number (the first half of two's complement), and to read a control bit's opposite you will reach for exactly this part. If you ever wire the two gates to different signals, you no longer have an inverter: the shared input is the whole trick.
Frequently asked
What is a NOT gate?
A NOT gate, or inverter, outputs the opposite of its input:
0 becomes 1 and 1 becomes 0. It is the simplest logic gate.How does a CMOS inverter work?
It uses two transistors sharing one input: a PMOS on top that connects the output to
VCC (logic 1) and an NMOS below that connects it to GND (logic 0). At input 0 the PMOS conducts and the output is 1; at input 1 the NMOS conducts and the output is 0. Exactly one transistor is ever on, so there is no short and no floating output.What is the difference between a NOT gate and a buffer?
A NOT gate inverts its input (
0 to 1, 1 to 0); a buffer passes the input through unchanged and just restores its strength. A buffer is two inverters in a row, since inverting twice cancels.You've got the theory. Now build it from scratch and watch it work.
Build it in the lab →