Fetch, decode, execute
The whole machine, running a program
A CPU runs one loop forever: fetch the next instruction from memory, decode its opcode, and execute it on the datapath. Driven by the control unit and clock, those three repeating steps are a working computer.
Build it in the lab →This is the summit. You have a datapath (blocks on a shared bus) and a control unit (a stepper plus decode logic). Wire the control lines to the datapath's enables, give it a clock, and the whole thing runs itself by repeating a single loop: fetch the next instruction, decode what it means, execute it. Round and round, one instruction per pass, for as long as the clock ticks. That loop is what makes a pile of registers and gates into a computer. Watch it run on a tiny program, step by step, in the interactive CPU simulator.
The fetch-decode-execute cycle
Every instruction goes through the same three phases, sequenced by the control unit's ring counter.
- Fetch. The program counter drives its address onto the bus; RAM reads out the instruction byte at that address; the instruction register latches it. Then the program counter increments, so it already points at the next instruction.
- Decode. The control unit looks at the instruction register's opcode and selects which sequence of control-line patterns this instruction needs. This is combinational: the opcode plus the current step picks the levers.
- Execute. The control unit walks the remaining micro-steps, gating values onto the bus and loading registers, so the datapath carries out the instruction: read an operand from memory, run the ALU, store the result in the accumulator.
The clock is the heartbeat. Each tick advances the control unit's step counter, which raises a fresh set of control lines, which causes exactly one transfer on the bus. A handful of ticks completes one instruction; then the step counter wraps, the next fetch begins, and the next instruction runs. Nothing in the machine 'decides' anything in the human sense: it is the same loop, clock after clock.
A tiny program
Picture a four-instruction program in RAM: load the number at address 14 into the accumulator, add the number at address 15, store the accumulator to address 13, then halt. The CPU fetches
LOAD 14, executes it (address 14 to bus, RAM read, accumulator load). It fetches ADD 15, executes it (address 15 to bus, RAM read into the ALU's B, ALU adds, accumulator loads the sum). It fetches STORE 13 (accumulator to bus, RAM writes address 13). It fetches HALT and stops the clock. You wrote arithmetic; the machine ran it. The next lesson, tracing a program, follows exactly this program byte by byte, register by register.ACCALU): driving the function code and operand over successive clocks runs a small program through the accumulator, exactly what the execute phase does once the control unit supplies those signals from a fetched instruction. The figure is shown mid-run: it has just computed clear-then-add-5, so the accumulator reads 5 (ACC0 and ACC2 high). (A full CPU adds the PC, RAM, IR, and control unit around this to fetch and decode automatically.) Open it in the lab and step a sequence, for example clear, add 5, add 10, subtract 15, and watch the accumulator compute 0, 5, 15, 0.Check yourself
Which of the three phases (fetch, decode, execute) is identical for *every* instruction, and which one differs depending on the opcode?
Answer
Fetch is identical for every instruction: drive the PC's address, read memory into the IR, increment the PC. Decode and execute differ by opcode: decode reads the opcode to pick which control-line pattern to use, and execute carries out that opcode's specific transfers (a LOAD reads memory into ACC, an ADD also runs the ALU, a STORE writes memory). Same fetch, opcode-specific execute.
What you have built is a tiny version of a real CPU, in the spirit of the classic SAP (Simple-As-Possible) machine. Real processors pile on registers, more instructions, wider buses, pipelining, and caches, but the core loop is the same fetch-decode-execute you just traced. Speed and features grow; the idea does not.
Look back at the whole climb. You started with a single transistor as a switch, made gates from it, arithmetic and memory from gates, and a register, ALU, counter, memory, and control unit from those, and finally a machine that runs a program. Every layer was something you could open in the lab and watch work. That is a computer, built from sand up. To cement it, the final lesson traces a real program through this machine, step by step, until you can hand-execute one yourself.
Frequently asked
What is the fetch-decode-execute cycle?
It is the single loop a CPU repeats forever: fetch the next instruction from memory, decode its opcode to see what it means, and execute it on the datapath. One instruction runs per pass, clock after clock.
What happens during each phase of the cycle?
Fetch: the program counter drives an address, RAM reads the instruction into the instruction register, and the counter increments. Decode: the control unit reads the opcode and picks the control-line pattern. Execute: it walks the micro-steps that gate values onto the bus and load registers.
Which part of the cycle is the same for every instruction?
Fetch is identical for every instruction: drive the PC's address, read memory into the IR, increment the PC. Decode and execute differ by opcode, because each opcode needs its own pattern of control lines and transfers.
How does a CPU actually run a program?
The clock is the heartbeat: each tick advances the control unit's step counter, which raises a fresh set of control lines, which causes exactly one transfer on the bus. A few ticks finish one instruction, the step counter wraps, the next fetch begins, and the next instruction runs. Nothing decides in a human sense; it is the same loop repeating.
You've got the theory. Now build it from scratch and watch it work.
Build it in the lab →