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Execute

Doing what the instruction says

3 min read

Execute is the phase that raises the control lines chosen during decode so the datapath actually carries out the instruction (moving an operand, running the ALU, and loading the accumulator or writing memory), landing the result where the opcode dictates.

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Fetch retrieved the instruction and decode worked out what it means and which control lines it needs. Execute is where those lines are finally raised and the datapath does the work: a byte moves across the bus, the ALU computes, and the result lands in the accumulator or in memory.

Execute differs by instruction

Unlike fetch, execute is different for each opcode, because each does a different thing:
  • LOAD addr: drive addr to memory, read the byte onto the bus, and load it into the accumulator.
  • ADD addr: drive addr to memory, send the byte to the ALU's B input, tell the ALU to add, and load the sum into the accumulator.
  • STORE addr: drive the accumulator onto the bus and tell memory to write it at addr.
  • HALT: stop the clock; no data moves.
Each of these is one or more micro-steps, and on each step exactly one source drives the bus while the destinations load. That is the control unit walking the control matrix for this opcode. When execute finishes, the machine loops back to fetch the next instruction.
The execute core (ACCALU): once the control unit supplies the function code (F0, F1) and an operand (B), driving the clock carries out the operation and lands the result in ACC. Open it in the lab and step a sequence, clear, add 5, add 10, subtract 15, and watch the accumulator compute 0, 5, 15, 0. The ZERO flag lights when ACC is 0.
Common mistakes. The cardinal rule of execute is the same as the control matrix: on any one step, at most one source may drive the bus (two drivers is a tri-state short), while any number of destinations may load. A STORE drives the accumulator out and lets memory read; it must not also enable another driver on that step. And execute acts on the instruction sitting in the instruction register, not a fresh byte from memory, so the IR must hold steady the whole time.
Try it
Trace which bus drivers are enabled to execute STORE 0x3.

Frequently asked

What happens during the execute phase?

Execute raises the control lines chosen during decode so the datapath actually performs the instruction: it moves an operand across the bus, runs the ALU if needed, and lands the result in the accumulator or writes it to memory. Then the machine loops back to fetch.

Why does execute differ for each instruction?

Because each opcode does something different. A LOAD reads memory into the accumulator, an ADD also runs the ALU and adds, a STORE writes the accumulator to memory, and a HALT stops the clock. The control unit raises a different pattern of control lines for each.

What is the rule for driving the bus during execute?

At most one source may drive the shared bus on any single step; two drivers at once is a tri-state short (X). Any number of registers may *load* from the bus on the same edge. Enforcing one driver per step is what keeps the datapath from corrupting itself.
Fetch, decode, and execute together are one turn of the CPU's loop. The exact lines execute raises for each instruction are laid out in the control signal matrix.

You've got the theory. Now build it from scratch and watch it work.

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