AND
NAND, then inverted
An AND gate outputs 1 only when all of its inputs are 1. In CMOS it is built as a NAND gate followed by an inverter, since a single static gate is naturally inverting.
Build it in the lab →This is the first lesson where you place no transistors at all. You compose two parts you already made and saved: NAND and NOT. That jump, from wiring transistors to wiring blocks, is the same jump real chip designers make, and the one that eventually lets a handful of parts become a CPU.
AND produces
1 only when both inputs are 1, and 0 otherwise. (New to the gates? The interactive gate tour lets you click the inputs of AND and every other gate and watch the output.) Beginners expect AND first, but in CMOS it is actually *more* expensive than NAND, because non-inverting behavior costs extra transistors. The practical move: build NAND (done), then invert it with NOT (done). The double inversion cancels and leaves AND.| A | B | F |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
1. Both inputs must be high.F = A ∧ B
Composing saved parts instead of adding transistors
You *could* graft two more transistors onto the NAND topology to get AND directly, but that makes a slower, larger gate. The CMOS habit is to keep building cheap inverting gates and cancel the inversion when you need a non-inverting one. Here, that means connecting the two saved parts:
- Place your saved NAND. Connect
AandBto its inputs. Its output isNOT (A AND B):0only when both inputs are1. - Place your saved NOT. Feed the NAND output into it.
- NOT inverts the NAND result:
NOT (NOT (A AND B))simplifies toA AND B. The two inversions cancel. - Label the final output
F. You now have a two-stage AND built entirely from library parts.
As an identity to confirm it:
F = NOT (A NAND B). NAND followed by NOT is exactly AND.A common slip: stopping after the NAND. A NAND on its own gives
1 for the A = B = 1 row and 0 elsewhere, the opposite of AND. If your "AND" reads 0 exactly where you expected 1, you forgot the output NOT that cancels NAND's inversion.Try it
Build AND as NAND -> NOT and sweep all four rows. For inputs
A = 1, B = 0: what does the NAND output, and what does the final NOT make it?Answer
With
A = 1, B = 0, the NAND outputs 1 (its output is 0 only when both inputs are 1). The NOT inverts that to 0, the correct AND result for 1 AND 0. Only the A = B = 1 row makes the NAND 0, which the NOT turns into the single 1 of AND.This is exactly how the rest of the course goes: compose small, verified blocks into larger ones rather than redesigning from transistors. Each level you pass saves a part, and that part is the raw material for the next.
AND earns its keep soon: the carry of a one-bit addition is
A AND B (next group), and a register only loads new data when a write-enable line ANDs through. You are stocking the shelf for the computer ahead.Frequently asked
What is an AND gate?
An AND gate outputs
1 only when all of its inputs are 1, and 0 otherwise. With two inputs, only the A = B = 1 row gives 1.Why is an AND gate built from a NAND and a NOT?
A single static CMOS gate is naturally inverting, so a direct AND costs extra transistors and is slower. The cheap habit is to build NAND (one inverting gate) and cancel its inversion with a NOT:
NOT (A NAND B) = A AND B.What is the difference between AND and OR?
AND outputs
1 only when every input is 1 (all conditions met); OR outputs 1 when at least one input is 1 (any condition met). AND is strict, OR is permissive.You've got the theory. Now build it from scratch and watch it work.
Build it in the lab →