Binary divider circuit: 4-bit by 2-bit array divider, live

A binary divider circuit computes a quotient and remainder, Q = A / B and R = A mod B. This one divides a 4-bit A by a 2-bit B with long division in hardware: four rows, one per bit of A, each trying a subtraction of B and keeping the result only if it does not go negative.

It is the restoring division algorithm unrolled into combinational logic, an array divider. Row k shifts the partial remainder left and brings down bit A_k, starting with A3, then tries subtracting B with three full adders (x + NOT B + 1, the two's complement subtractor). If there is no borrow, the quotient bit Q_k is 1 and the difference becomes the new remainder; if there is a borrow, Q_k is 0 and two 2-to-1 multiplexers restore the old value. Because each remainder is smaller than B, it always fits in two bits. Division by zero has no answer: with B = 0 every subtraction succeeds, so this circuit outputs Q = 1111 and R = A1 A0, and real dividers flag it as an error instead. The full adders and multiplexers are verified parts, and all 64 input combinations are checked before the page is built. The live circuit starts at 0 / 1, so Q and R are both 0.

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What you need

• 12× full adder: three per row: x + NOT B + 1, the trial subtraction
• 8× 2-to-1 multiplexer: two per row: keep the difference or restore the remainder
• 2× NOT: NOT B1 and NOT B0, shared by all rows
• 2× constant: 1 for the carry in and the top bit of NOT B, 0 for the starting remainder

Step by step

1. Place inputs A3 to A0, B1, B0 and probes Q3 to Q0, R1, R0.
2. Row 3: form x = 0 0 A3 and subtract B with three full adders, adding NOT B (with a 1 in the top bit) and a carry in of 1.
3. The top carry out is the quotient bit: 1 means x is at least B. Use it to select, with two 2-to-1 muxes, either the difference or x as the new 2-bit remainder.
4. Repeat for rows 2, 1 and 0, each shifting the remainder left and bringing down the next bit of A.
5. After row 0 the quotient is Q3 Q2 Q1 Q0 and the last remainder is R1 R0. Try 1101 / 11: 13 / 3 = 4 remainder 1.

Binary divider examples

Eight sample rows of the 64. Every row satisfies A = Q x B + R with R < B, except B = 0, shown last, where the circuit outputs Q = 1111 and R = A1 A0 because division by zero is undefined. Larger dividers repeat the same row with wider subtractors and more rows, one per dividend bit, which is why hardware division is slow compared with multiplication; the restoring division calculator steps through the same algorithm for any size.

You can also read the full theory in the lesson on binary division. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Frequently asked

How does a binary divider circuit work?

It does long division in hardware. Each step shifts the partial remainder left, brings down the next dividend bit, and subtracts the divisor. If the subtraction does not borrow, the quotient bit is 1 and the difference is kept; otherwise the quotient bit is 0 and the old remainder is restored.

What is an array divider?

A divider built from a grid of subtractor cells, one row per quotient bit, so the whole division happens combinationally in one pass instead of over several clock cycles. This page is a 4-row array divider.

What is the difference between restoring and non-restoring division?

Restoring division undoes a failed subtraction by restoring the old remainder, here with multiplexers. Non-restoring division keeps the negative remainder and adds the divisor back in the next step instead, which saves the restore step.

What does a divider do when dividing by zero?

Division by zero is undefined. In this circuit every trial subtraction of 0 succeeds, so it outputs Q = 1111 and R = A1 A0; real processors detect a zero divisor and raise an error or exception.