How to build a 1-bit ALU from logic gates

A 1-bit ALU takes two bits A and B, a carry-in and a 2-bit function code, and outputs one result bit R and a carry-out: F1 F0 = 00 adds, 01 subtracts, 10 ANDs and 11 ORs. Chain four of them and you have a 4-bit ALU.

Like any ALU it computes every operation at once and lets multiplexers pick the one the function code asks for. A full adder adds A, B XOR F0 and the carry-in, so with F0 = 1 it sees B inverted, which is how subtraction reuses the adder: in a chain, the first slice gets a carry-in of 1, and A + (NOT B) + 1 is A - B in two's complement. Next to the adder, one AND and one OR gate compute the logic results, a 2-to-1 multiplexer picks between them by F0, and a second picks the adder's sum or that logic result by F1. The 4-bit ALU is exactly four of these slices sharing F1 F0, with each carry-out feeding the next carry-in. All 32 combinations of the five inputs are checked before the page is built.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

1× XOR: B XOR F0: inverts B for subtraction
1× full adder: A + (B XOR F0) + Cin: 2 XOR, 2 AND and 1 OR
1× AND: A AND B
1× OR: A OR B
2× 2-to-1 mux: AND or OR by F0, then sum or logic by F1 (each 2 AND and 1 OR)
2× NOT: NOT F0 and NOT F1 for the multiplexers

Step by step

Place inputs A, B, Cin, F1 and F0, and probes R and Cout.
XOR B with F0, and feed A, that result and Cin into a full adder. Its carry is Cout.
Compute A AND B and A OR B, and pick one with a 2-to-1 mux controlled by F0 (0 picks AND, 1 picks OR).
Pick the final result with a second mux controlled by F1: 0 takes the adder's sum, 1 takes the logic result. Probe it as R.
Try each function code. For 1 - 1 in the first slice of a chain, set A = 1, B = 1, Cin = 1 and F1 F0 = 01: R = 0 and Cout = 1 (no borrow).

Function table

F1 F0	Operation	R	Cout
00	ADD	A XOR B XOR Cin	carry of A + B + Cin
01	SUB	A XOR (NOT B) XOR Cin	carry of A + (NOT B) + Cin
10	AND	A AND B	not used
11	OR	A OR B	not used

In the logic modes the adder still runs, so Cout shows the carry of A + (B XOR F0) + Cin, but nothing should read it; the 4-bit ALU only uses its last carry-out for ADD and SUB. The carry-in matters only to the adder: the first slice of a chain gets Cin = F0, so it is 0 for ADD and 1 for SUB.

You can also read the full theory in the lesson on the ALU. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adder full adder half subtractor full subtractor 2:1 multiplexer 4:1 multiplexer XOR gate from NAND gates 2-to-4 decoder SR latch D flip-flop JK flip-flop T flip-flop 4-bit shift register 4-bit ripple carry adder D latch 1-to-4 demultiplexer 4-bit magnitude comparator 4-bit ring counter 4-bit Johnson counter 4-to-2 priority encoder 4-bit synchronous counter 3-to-8 decoder 8-to-1 multiplexer 4-bit carry lookahead adder half adder from NAND gates 2-bit comparator BCD to 7-segment decoder 4-bit up/down counter decade counter 2-bit multiplier 4-bit ALU 4-bit array multiplier NOT, AND, OR and NOR from NAND NOT, OR, AND and XOR from NOR full adder from NAND gates SR latch from NAND gates parity generator and checker 4-bit adder/subtractor BCD adder 4-bit universal shift register mod-6 counter 4-bit ripple counter binary to Gray code converter half adder from NOR gates full adder from NOR gates 4-bit register with parallel load 1011 sequence detector binary to BCD converter D flip-flop from NAND gates CMOS inverter CMOS NAND gate CMOS NOR gate PISO shift register SR flip-flop from NAND gates BCD to excess-3 code converter

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 1-bit ALU in the lab →

Frequently asked

What is a 1-bit ALU?

One bit-slice of an arithmetic logic unit: it computes one bit of every operation (here add, subtract, AND, OR) for one bit position, and a function code picks which result comes out. Wider ALUs are made by placing one slice per bit and chaining their carries.

How do you make a 4-bit ALU from 1-bit ALUs?

Place four slices, share the function code F1 F0 between them, connect each slice's carry-out to the next slice's carry-in, and drive the first carry-in with F0 so subtraction adds the extra 1. The four R outputs are the 4-bit result.

How does a 1-bit ALU subtract?

It inverts B with an XOR controlled by F0 and adds. Across a whole chain, A + (NOT B) + 1 is A - B in two's complement, and the +1 comes from setting the first slice's carry-in to 1.

What does the carry-out mean in AND or OR mode?

Nothing useful. The adder keeps computing in every mode, so Cout still changes, but the logic operations have no carry and the result multiplexer ignores the adder's sum.