How to build a 4-bit carry lookahead adder from logic gates

A 4-bit carry lookahead adder computes every carry directly from the inputs instead of waiting for it to ripple: with propagate P_i = A_i XOR B_i and generate G_i = A_i AND B_i, each carry is a sum of products such as C2 = G1 + P1 G0 + P1 P0 C0, and each sum bit is S_i = P_i XOR C_i.

In a ripple carry adder the top bit cannot settle until the carry has walked through every stage below it. The lookahead adder removes that chain. A column generates a carry when both its bits are 1, and propagates an incoming carry when exactly one is 1, so "there is a carry into bit k" means some lower column generated one and every column between passed it on. Writing that out for every k gives each carry as its own formula over P, G and the carry-in, and no carry waits on another. All 512 input combinations of this circuit are checked against real addition before the page is built.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

4× XOR: propagate P_i = A_i XOR B_i
4× AND: generate G_i = A_i AND B_i
20× AND: the product terms of C1 to C4 (each term an AND chain of P's ending in a G or the carry-in)
10× OR: summing the terms of each carry
4× XOR: the sum bits S_i = P_i XOR C_i

Step by step

Place inputs A3 to A0, B3 to B0 and the carry-in Cin (C0).
For every bit build P_i = A_i XOR B_i and G_i = A_i AND B_i.
Build each carry from P, G and C0 only: C1 = G0 + P0 C0, C2 = G1 + P1 G0 + P1 P0 C0, C3 = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 C0, and C4 the same way with one more term. Every product is an AND chain and every carry an OR of its terms.
Make the sums: S_i = P_i XOR C_i. Probe S0 to S3 and C4 as Cout.
Try 0111 + 0001 again, the worst case for a ripple adder: bit 0 generates the carry (G0 = 1), and here C3 comes straight from the term P2 P1 G0 instead of waiting for C1 and C2.

Carry equations for 4 bits

Carry	Lookahead equation
C1	G0 + P0 C0
C2	G1 + P1 G0 + P1 P0 C0
C3	G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 C0
C4 (Cout)	G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0 + P3 P2 P1 P0 C0

With gates of any width, every carry is two levels of logic (one AND level, one OR level) after P and G, so the delay no longer grows with the bit count. Built from 2-input gates, as here, the AND and OR chains get longer for the higher carries, and the gate count grows quickly with width, which is why real adders apply lookahead in 4-bit groups and then look ahead across the groups. The sums themselves are the same as the ripple adder's: the live circuit starts at 0000 + 0000.

You can also read the full theory in the lesson on carry lookahead. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 4-bit carry lookahead adder in the lab →

Frequently asked

What are generate and propagate in a carry lookahead adder?

For column i, generate G_i = A_i AND B_i means the column produces a carry by itself (1 + 1). Propagate P_i = A_i XOR B_i means the column passes an incoming carry through (exactly one bit is 1). A carry leaves column i when G_i = 1, or when P_i = 1 and a carry came in.

What is the carry equation of a 4-bit carry lookahead adder?

C1 = G0 + P0C0, C2 = G1 + P1G0 + P1P0C0, C3 = G2 + P2G1 + P2P1G0 + P2P1P0C0, and C4 = G3 + P3G2 + P3P2G1 + P3P2P1G0 + P3P2P1P0C0.

Why is a carry lookahead adder faster than a ripple carry adder?

In a ripple adder each carry waits for the one below it, so the delay grows linearly with the width. A lookahead adder computes every carry directly from the inputs in a fixed number of gate levels, so all carries are ready at about the same time.

What is the disadvantage of a carry lookahead adder?

Size. The carry formulas get longer for every higher bit, needing wider AND and OR gates or more of them, so the hardware grows much faster than a ripple adder's. Wide adders therefore use lookahead within 4-bit blocks and a second level of lookahead between blocks.