How to build a 4-bit magnitude comparator from logic gates

A 4-bit magnitude comparator compares two 4-bit numbers A and B and raises exactly one of three outputs: A > B, A = B or A < B. It checks the bits from the most significant down: the first bit position where A and B differ decides which is larger.

Comparing two binary numbers works just like comparing two decimal numbers of the same length: look at the leftmost digit first, and only if those are equal move on to the next. In gates, an XNOR per bit says whether that bit pair is equal, and a chain of ANDs carries the "all higher bits are equal" condition down to the lower bits. All 256 input combinations of this circuit are checked against a real numeric comparison before the page is built, and the live circuit starts at A = B = 0000, so EQ is lit.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

4× XNOR: x_i = A_i XNOR B_i, 1 when bit i of A and B are equal
8× NOT: NOT A_i and NOT B_i for each bit
17× AND: per bit A_i AND NOT B_i and NOT A_i AND B_i, the equality prefixes, and the gated terms
6× OR: collecting the greater-than terms and the less-than terms

Step by step

Place inputs A3 to A0 and B3 to B0. For each bit, an XNOR gives x_i: 1 when A_i equals B_i.
For each bit, build the two "this bit decides" signals: A_i AND NOT B_i (A has the 1, so A is bigger here) and NOT A_i AND B_i (B is bigger here).
Chain the equalities from the top: x3, then x3 AND x2, then x3 AND x2 AND x1. These say "every bit above this one is equal". AND in x0 as well and you have EQ.
Greater-than: bit 3 decides on its own, bit 2 decides only if bit 3 was equal, and so on. So GT = A3B3' + x3 A2B2' + x3x2 A1B1' + x3x2x1 A0B0', built from three ANDs and three ORs. Build LT the same way from the B-is-bigger signals.
Probe GT, EQ and LT. Try A = 1000, B = 0111: bit 3 differs, so GT = 1 even though B has more 1s.

Example comparisons

A	B	GT	EQ	LT
0000	0000	0	1	0
1000	0111	1	0	0
0101	0110	0	0	1
1011	1011	0	1	0
1110	1101	1	0	0

Exactly one output is 1 for every pair of inputs. In the last row the top two bits are equal, so bit 1 decides (1 against 0), and A is larger. These are unsigned comparisons; signed two's-complement numbers need the sign bits handled first, which is why processors usually compare by subtracting and reading the carry, zero and overflow flags.

You can also read the full theory in the lesson on comparators. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 4-bit magnitude comparator in the lab →

Frequently asked

How does a 4-bit magnitude comparator work?

It compares from the most significant bit down. XNOR gates mark which bit pairs are equal; the first pair that differs decides the result, so each lower bit's decision is ANDed with the condition that all higher bits are equal. A = B when all four XNORs are 1.

What is the Boolean expression for A > B in a 4-bit comparator?

With x_i = A_i XNOR B_i: A > B = A3 B3' + x3 A2 B2' + x3 x2 A1 B1' + x3 x2 x1 A0 B0'. A < B is the same with A and B swapped, and A = B = x3 x2 x1 x0.

What is a 1-bit comparator?

The single-bit case: A > B = A AND NOT B, A < B = NOT A AND B, and A = B = A XNOR B. A 4-bit comparator uses one of these per bit plus the chaining logic.

Is the 7485 a magnitude comparator?

Yes. The 7485 (and 74HC85) is a 4-bit magnitude comparator with A > B, A = B and A < B outputs, plus cascade inputs so several can be chained to compare wider numbers.