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How to build a 1-to-4 demultiplexer from logic gates

A 1-to-4 demultiplexer routes one data input D to one of four outputs Y0 to Y3, chosen by two select lines S1 and S0; the other three outputs stay 0. It is a 2-to-4 decoder whose four AND outputs are each gated by D.

Think of it as the mirror image of a 4-to-1 multiplexer: a mux picks one of many inputs to send to a single output, a demux takes a single input and sends it to one of many outputs. Inside a computer that is how one write signal is steered to exactly one register or memory row.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

Step by step

  1. Place a data input D and two select inputs S1 and S0. Invert both selects with NOT gates.
  2. Build the 2-to-4 decoder: four AND gates fed with S1' S0', S1' S0, S1 S0' and S1 S0. Exactly one of them is 1 for any select value.
  3. Gate each decoder line with the data: AND it with D. The outputs of these four ANDs are Y0 to Y3.
  4. Probe Y0 to Y3. Set D = 1 and step S1 S0 through 00, 01, 10, 11: the 1 moves from Y0 to Y3. Set D = 0 and every output is 0 whatever the selects say.

1-to-4 demultiplexer truth table

S1S0Y0Y1Y2Y3
00D000
010D00
1000D0
11000D

Each row sends the data value D to one output and holds the rest at 0. In Boolean form: Y0 = D AND NOT S1 AND NOT S0, Y1 = D AND NOT S1 AND S0, Y2 = D AND S1 AND NOT S0, Y3 = D AND S1 AND S0. Hold D at 1 and the demux is exactly a 2-to-4 decoder, which is why the two names are often used for the same chip (the 74HC139 is sold as a decoder/demultiplexer).

You can also read the full theory in the lesson on encoders and demultiplexers. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adderfull adderhalf subtractorfull subtractor2:1 multiplexer4:1 multiplexerXOR gate from NAND gates2-to-4 decoderSR latchD flip-flopJK flip-flopT flip-flop4-bit shift register4-bit ripple carry adderD latch4-bit magnitude comparator4-bit ring counter4-bit Johnson counter4-to-2 priority encoder4-bit synchronous counter3-to-8 decoder8-to-1 multiplexer4-bit carry lookahead adderhalf adder from NAND gates2-bit comparator

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 1-to-4 demultiplexer in the lab →

Frequently asked

What does a demultiplexer do?

It takes one data input and connects it to one of several outputs, picked by a binary select value. A 1-to-4 demux has 2 select lines; a 1-to-8 demux has 3. The unselected outputs are held at 0 (in this design) rather than floating.

What is the difference between a demultiplexer and a decoder?

A decoder turns an n-bit address into one active line out of 2^n. A demultiplexer adds a data input and routes that data onto the selected line. Feed a constant 1 into a demux's data input and it behaves as a decoder; add an enable input to a decoder and it behaves as a demux.

What is the difference between a multiplexer and a demultiplexer?

A multiplexer (mux) selects one of many inputs and passes it to a single output (many to one). A demultiplexer (demux) takes a single input and passes it to one of many outputs (one to many). Both use select lines to choose.

How many select lines does a 1-to-4 demultiplexer need?

Two, because two bits can name four outputs (00, 01, 10, 11). In general a 1-to-2^n demux needs n select lines.