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How to build a 3-to-8 decoder from logic gates

A 3-to-8 decoder turns a 3-bit binary number A2 A1 A0 into eight output lines Y0 to Y7, exactly one of which is 1: the line whose number matches the input. With three inputs there are 23 = 8 combinations, so eight outputs.

It is the 2-to-4 decoder one size up, and the same idea scales to any width: n input bits select one of 2n lines. Decoders are how an address picks one memory row, how an opcode switches on one operation, and, with an extra data input, they become demultiplexers. The live circuit starts at 000, so Y0 is lit.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

Step by step

  1. Place the address inputs A2, A1 and A0 and invert each with a NOT gate.
  2. Decode the low two bits first: four AND gates for A1' A0', A1' A0, A1 A0' and A1 A0. This is a 2-to-4 decoder.
  3. Split each of those four lines by the top bit: AND it with NOT A2 for outputs Y0 to Y3 and with A2 for Y4 to Y7. Eight ANDs, eight outputs.
  4. Probe Y0 to Y7 and count through the inputs 000 to 111: the single 1 steps from Y0 to Y7.

3-to-8 decoder truth table

A2A1A0Y0Y1Y2Y3Y4Y5Y6Y7
00010000000
00101000000
01000100000
01100010000
10000001000
10100000100
11000000010
11100000001

Each output is one minterm of the three inputs, for example Y5 = A2 AND NOT A1 AND A0. That is why a decoder plus an OR gate can implement any 3-input Boolean function: OR together the outputs for the rows where the function is 1. The 74HC138 is the classic 3-to-8 decoder chip; it adds enable inputs and active-low outputs.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adderfull adderhalf subtractorfull subtractor2:1 multiplexer4:1 multiplexerXOR gate from NAND gates2-to-4 decoderSR latchD flip-flopJK flip-flopT flip-flop4-bit shift register4-bit ripple carry adderD latch1-to-4 demultiplexer4-bit magnitude comparator4-bit ring counter4-bit Johnson counter4-to-2 priority encoder4-bit synchronous counter8-to-1 multiplexer4-bit carry lookahead adderhalf adder from NAND gates2-bit comparator

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 3-to-8 decoder in the lab →

Frequently asked

How does a 3-to-8 decoder work?

Each of its eight outputs is an AND of the three inputs, each taken either straight or inverted, so each output is 1 for exactly one input combination. The input value, read as a binary number, names the output that goes high.

How many AND gates does a 3-to-8 decoder need?

Eight 3-input AND gates, one per output, plus three inverters. With only 2-input gates, as here, you can share work: four ANDs decode A1 A0, and eight more combine those with A2 or NOT A2, for twelve 2-input ANDs in total.

How do you build a 3-to-8 decoder from 2-to-4 decoders?

Use two 2-to-4 decoders on A1 A0 and enable one with NOT A2 (giving Y0 to Y3) and the other with A2 (giving Y4 to Y7). This page's circuit is the same idea with the shared 2-to-4 stage ANDed with A2 and NOT A2.

What is a 3-to-8 decoder used for?

Selecting one of eight things from a 3-bit number: memory chips or rows, registers, devices on a bus, or the control line for an instruction. With an OR gate it also implements any 3-variable logic function from its minterms.