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How to build a 4-to-2 priority encoder from logic gates

A 4-to-2 priority encoder outputs the 2-bit index of the highest-numbered active input among D3 to D0, plus a valid bit V that is 1 when any input is active. If D3 is 1 the output is 11 no matter what the other inputs do.

A plain encoder assumes exactly one input is active at a time and gives garbage when two are. A priority encoder settles the conflict with a fixed ranking: the highest input wins. That is exactly what an interrupt controller needs when several devices ask for attention at once, and the valid bit tells "input D0 is active" apart from "nothing is active", which both produce the code 00. The whole thing is only six gates.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

Step by step

  1. Place four request inputs D3 (highest priority) down to D0 (lowest).
  2. The high output bit is 1 for inputs 3 and 2: Y1 = D3 OR D2. Lower inputs never reach it, so no priority logic is needed here.
  3. The low output bit is 1 for inputs 3 and 1, but input 1 must lose to input 2: Y0 = D3 OR (NOT D2 AND D1). Build it with a NOT, an AND and an OR.
  4. The valid bit is the OR of everything: V = (D3 OR D2) OR (D1 OR D0), reusing Y1's OR gate.
  5. Probe Y1, Y0 and V. Turn on D0, then D1, then D3, and watch the code jump to the highest active input each time.

4-to-2 priority encoder truth table

D3D2D1D0Y1Y0V
0000000
0001001
001x011
01xx101
1xxx111

The x entries are don't-cares: once a higher input is active, lower ones cannot change the result. Five rows cover all sixteen input combinations, and every one of the 16 is checked against a reference before the page is built. Note the first two rows: both output 00, and only V tells them apart.

You can also read the full theory in the lesson on the priority encoder. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adderfull adderhalf subtractorfull subtractor2:1 multiplexer4:1 multiplexerXOR gate from NAND gates2-to-4 decoderSR latchD flip-flopJK flip-flopT flip-flop4-bit shift register4-bit ripple carry adderD latch1-to-4 demultiplexer4-bit magnitude comparator4-bit ring counter4-bit Johnson counter4-bit synchronous counter3-to-8 decoder8-to-1 multiplexer4-bit carry lookahead adderhalf adder from NAND gates2-bit comparator

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 4-to-2 priority encoder in the lab →

Frequently asked

What is a priority encoder?

An encoder that outputs the binary index of the highest-priority active input, ignoring any lower-priority inputs that are also active, usually with a valid output that says whether any input is active at all.

What are the equations of a 4-to-2 priority encoder?

With D3 as the highest priority: Y1 = D3 + D2, Y0 = D3 + D2' D1, and the valid bit V = D3 + D2 + D1 + D0.

What is the difference between an encoder and a priority encoder?

A plain encoder is only correct when exactly one input is active; with two active inputs its output is a meaningless mix. A priority encoder defines that case by always reporting the highest active input.

Why does a priority encoder need a valid output?

Because 'only D0 is active' and 'no input is active' both give the code 00. The valid bit V is 1 only when at least one input is active, so the two cases can be told apart.