How to build a 4-bit ripple carry adder from logic gates
A 4-bit ripple carry adder adds two 4-bit numbers with four full adders in a row, each stage's carry-out wired into the next stage's carry-in, so the carry ripples from the lowest bit to the highest.
It is binary addition done exactly the way you add on paper: column by column from the right, carrying into the next column. Each column is one full adder (two XOR, two AND and one OR gate), and chaining four of them gives sum bits S3 to S0 plus a final carry-out Cout, the fifth bit of the result. Every one of the 512 input combinations of this circuit is checked against real addition before the page is built. The live circuit below starts with every input at 0; click the inputs to try your own numbers (set every A, B and Cin to 1 to see 15 + 15 + 1 = 31, which is 11111).
Open this circuit in the lab →
What you need
- 4× full adder: one per bit column, each made of 2 XOR, 2 AND and 1 OR gate (20 gates in total)
- 8× XOR: two per stage: A XOR B, then that XOR the carry-in, giving the sum bit
- 8× AND: two per stage: A AND B, and the carry-in AND (A XOR B)
- 4× OR: one per stage, merging the two carry terms into the carry-out
Step by step
- Place the inputs:
A3toA0for the first number,B3toB0for the second, and a carry-inCin(leave it at 0 for plain addition). - Build bit 0 as a full adder:
A0 XOR B0, then XOR that withCinto get the sumS0. The carry-out is(A0 AND B0) OR (Cin AND (A0 XOR B0)). - Build bit 1 the same way from
A1andB1, but take its carry-in from bit 0's carry-out instead of from Cin. That wire is the ripple. - Repeat for bits 2 and 3, each taking its carry-in from the stage below. Probe the four sums as
S0toS3and bit 3's carry-out asCout. - Try 0111 + 0001: the carry is generated in bit 0 and has to pass through bits 1, 2 and 3 before the answer 1000 settles. That longest path is the ripple delay.
Example additions
| A | B | Cin | S (S3..S0) | Cout |
|---|---|---|---|---|
| 0011 | 0101 | 0 | 1000 | 0 |
| 0111 | 0001 | 0 | 1000 | 0 |
| 1010 | 0101 | 0 | 1111 | 0 |
| 0110 | 0011 | 1 | 1010 | 0 |
| 1111 | 0001 | 0 | 0000 | 1 |
| 1001 | 0110 | 1 | 0000 | 1 |
The full table has 29 = 512 rows, so here are a few that show the carry at work: 3 + 5 = 8, 15 + 1 = 16 (all four sum bits roll over to 0 and Cout becomes the fifth bit), and 9 + 6 + 1 = 16. Read Cout together with S3..S0 as one 5-bit answer. For signed two's-complement numbers, overflow is a different test: compare the carry into bit 3 with the carry out of it (see carry versus overflow).
You can also read the full theory in the lesson on the 8-bit adder. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 4-bit ripple carry adder in the lab →Frequently asked
How does a ripple carry adder work?
It chains full adders, one per bit. Each full adder adds its two input bits plus the carry from the stage to its right and passes its own carry to the stage on its left. The carry ripples from the least significant bit to the most significant, like carrying in long addition on paper.
How many full adders does a 4-bit ripple carry adder need?
Four, one per bit. The lowest stage can be a half adder if there is no carry-in, but using a full adder with Cin lets you chain adders into wider ones and turn the adder into a subtractor (invert B and set Cin = 1).
What is the disadvantage of a ripple carry adder?
Speed. The carry must pass through every stage in turn, two gate delays (an AND and an OR) per bit, so the worst-case delay grows linearly with the width. A carry-lookahead adder computes the carries in parallel to avoid that chain, at the cost of more gates.
What is the difference between a ripple carry adder and a carry lookahead adder?
Both produce the same sums. The ripple carry adder waits for each carry to arrive from the previous stage; the carry lookahead adder derives every carry directly from the inputs using generate (A AND B) and propagate (A XOR B) signals, so it is faster but larger. See the carry lookahead lesson for the derivation.