CMOS NOR gate: four transistors, live

A CMOS NOR gate uses four transistors: two PMOS in series from the supply to the output, and two NMOS in parallel from the output to ground. The output is 1 only when both inputs are 0, because only then are both series PMOS on while both NMOS are off.

It is the mirror image of the CMOS NAND gate: series and parallel are swapped between the two networks. NMOS in parallel pull the output to 0 as soon as A or B is 1; PMOS in series pull it to 1 only when A and B are both 0. NOR is universal too, though it is used less than NAND in CMOS because its stacked PMOS are the slower kind of transistor. An OR gate is this circuit plus a CMOS inverter.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

2× PMOS transistor: in series between VDD and the output, one gated by A and one by B
2× NMOS transistor: in parallel between the output and GND, one gated by A and one by B

Step by step

Place VDD, GND, inputs A and B, and a probe Y on the output node.
Pull-up: stack two PMOS from VDD to the output, one gated by A and one by B.
Pull-down: put two NMOS side by side, each from the output to GND, one gated by A and one by B.
Try all four input pairs: only A = B = 0 turns both PMOS on (and both NMOS off), giving Y = 1.

CMOS NOR truth table, transistor by transistor

A	B	PMOS A	PMOS B	NMOS A	NMOS B	Y
0	0	on	on	off	off	1
0	1	on	off	off	on	0
1	0	off	on	on	off	0
1	1	off	off	on	on	0

Any 1 on an input turns on a parallel NMOS and breaks the PMOS stack, so only the first row reaches VDD. All four rows are checked on the live circuit before the page is built.

You can also read the full theory in the lesson on the NOR gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the CMOS NOR gate in the lab →

Frequently asked

How many transistors are in a CMOS NOR gate?

Four for a 2-input NOR: two PMOS in series and two NMOS in parallel. An n-input NOR uses n of each.

What is the difference between a CMOS NAND and NOR gate?

They swap series and parallel. NAND has parallel PMOS and series NMOS; NOR has series PMOS and parallel NMOS. Both use four transistors for two inputs.

Why are the PMOS in series in a NOR gate?

Because the output must be pulled to 1 only when every input is 0. A PMOS is on when its gate is 0, and series switches conduct only when all of them are on.

How do you make an OR gate from transistors?

Follow the NOR gate with a CMOS inverter, six transistors in total.