CMOS inverter: a NOT gate from two transistors
A CMOS inverter is a NOT gate made of two transistors: a PMOS from the supply to the output and an NMOS from the output to ground, with both gates tied to the input. When the input is 0 the PMOS conducts and the output is 1; when the input is 1 the NMOS conducts and the output is 0.
The two transistors are complementary: a PMOS switch is on when its gate is 0, an NMOS switch is on when its gate is 1, so for either input value exactly one of them conducts. That is the whole idea of CMOS, and it is why a CMOS inverter draws almost no current while it sits still: there is never a steady path from the supply to ground. Every other CMOS gate is the same pattern with more transistors: a pull-up network of PMOS and a pull-down network of NMOS that are never on together. The live circuit below is the same transistor drawing the course has you build first; the NMOS and PMOS lessons explain each switch, and the MOSFET simulator lets you try one alone.
Open this circuit in the lab →
What you need
- 1× PMOS transistor: from VDD (1) to the output: the pull-up, on when A = 0
- 1× NMOS transistor: from the output to GND (0): the pull-down, on when A = 1
Step by step
- Place a supply (VDD) at the top and a ground (GND) at the bottom, an input
Aon the left and a probeYon the right. - Put a PMOS between VDD and the output node, and an NMOS between the output node and GND.
- Wire A to the gates of both transistors.
- Toggle A: with A = 0 the PMOS connects Y to VDD (Y = 1); with A = 1 the NMOS connects Y to GND (Y = 0).
CMOS inverter truth table
| A | PMOS | NMOS | Y |
|---|---|---|---|
| 0 | on | off | 1 |
| 1 | off | on | 0 |
In each row exactly one transistor conducts, so the output is always driven to a clean 0 or 1 and no current flows straight from VDD to GND. Both rows are checked on the live circuit before the page is built.
You can also read the full theory in the lesson on CMOS logic. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the CMOS inverter in the lab →Frequently asked
How many transistors are in a CMOS inverter?
Two: one PMOS and one NMOS. The PMOS pulls the output up to 1 when the input is 0, and the NMOS pulls it down to 0 when the input is 1.
How does a CMOS inverter work?
Both transistor gates are tied to the input. A PMOS conducts when its gate is 0 and an NMOS when its gate is 1, so for each input exactly one of them connects the output to a supply rail: to VDD for input 0, to ground for input 1.
Why does a CMOS inverter use almost no static power?
Because the PMOS and NMOS are never on at the same time in a steady state, so there is no direct path from the supply to ground. Current flows mainly while the output switches, to charge or discharge the load.
How do you make a NOT gate with transistors?
In CMOS, with one PMOS between the supply and the output and one NMOS between the output and ground, both gates driven by the input. Older single-transistor designs use a resistor as the pull-up instead of the PMOS, at the cost of current flowing whenever the output is 0.