How to build a half adder using only NOR gates

A half adder can be built from five NOR gates: two invert A and B, a third NORs the inverted inputs to give the carry C = A AND B, and the last two combine NOR(A, B) with that carry into the sum S = A XOR B.

NOR is a universal gate, like NAND, so a half adder can be made from NORs alone. The carry comes straight from De Morgan's law: NOR(NOT A, NOT B) = NOT (NOT A OR NOT B) = A AND B. The sum reuses that carry: S = NOR(C, NOR(A, B)) is 1 only when A OR B is 1 and A AND B is not, which is exactly XOR. Compare it with the five-gate NAND half adder, the ordinary XOR and AND half adder, and the other gates built from NOR. All four input rows are checked before the page is built.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

2× NOR: inverters, each with both inputs tied: NOT A and NOT B
1× NOR: C = NOR(NOT A, NOT B) = A AND B
1× NOR: N = NOR(A, B), which is 1 only when both inputs are 0
1× NOR: S = NOR(C, N) = A XOR B

Step by step

Place inputs A and B. Make NOT A and NOT B with two NOR gates, each with both of its inputs tied to the same signal.
NOR the two inverted inputs together. By De Morgan's law that is A AND B; probe it as the carry C.
In a fourth NOR, combine A and B directly: N = NOR(A, B).
NOR the carry with N. The output is 1 only when neither "both inputs are 1" nor "both inputs are 0" holds, so it is A XOR B; probe it as the sum S.
Toggle A and B through 00, 01, 10, 11 and check S and C against the truth table below.

Half adder truth table

A	B	S	C
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

The same function as any other half adder, so the table is identical. Each CMOS NOR gate is four transistors (two PMOS in series, two NMOS in parallel), so this half adder is 20 transistors, the same as the NAND version.

You can also read the full theory in the lesson on the half adder. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the half adder from NOR gates in the lab →

Frequently asked

How many NOR gates are needed for a half adder?

Five. Two NOR gates invert A and B, one NORs the inverted inputs into the carry A AND B, one makes NOR(A, B), and the last NORs those two results into the sum A XOR B.

Why can a half adder be built from NOR gates only?

NOR is functionally complete: a NOR with its inputs tied is a NOT, a NOR followed by a NOT is an OR, and a NOR of two inverted inputs is an AND, so every Boolean function can be built from NORs.

Is a NOR half adder bigger than a NAND half adder?

No. Both take five gates. The NAND version builds the sum from a 4-NAND XOR and inverts its first gate for the carry; the NOR version builds the carry first and reuses it for the sum.

How many NOR gates does a full adder need?

Nine, the same as with NAND gates: four make A XNOR B, four more combine it with the carry-in into the sum, and one gives the carry out.