How to build a 4-bit ALU from logic gates

A 4-bit ALU (arithmetic logic unit) takes two 4-bit numbers A and B and a function code F1 F0, and outputs a 4-bit result: 00 adds, 01 subtracts (A - B), 10 ANDs and 11 ORs. This one also outputs the adder's carry Cout and a zero flag Z.

Every operation is computed at the same time, and multiplexers pick the one the function code asks for. Subtraction reuses the adder: with F0 = 1 every B bit passes through an XOR that inverts it and the carry-in is 1, so the adder computes A + (NOT B) + 1, which is A - B in two's complement. That trick is why a CPU needs only one adder. The live circuit starts at 0000 + 0000 with F1 F0 = 00 (ADD), so Z is lit. All 1,024 combinations of inputs and function codes are checked before the page is built.

Open this circuit in the lab →

What you need

• 4× XOR: B_i XOR F0: inverts B when subtracting
• 4× full adder: a ripple-carry adder (each 2 XOR, 2 AND, 1 OR) with carry-in F0
• 4× AND: A_i AND B_i
• 4× OR: A_i OR B_i
• 8× 2:1 mux: per bit, F0 picks AND or OR, then F1 picks the adder or the logic result (each 2 AND, 1 OR)
• 2× NOT: NOT F1 and NOT F0 for the mux selects
• 3× OR: plus one NOT: the zero flag Z = NOT (R0 OR R1 OR R2 OR R3)

Step by step

1. Place inputs A3 to A0, B3 to B0, and the function code F1, F0.
2. Build the arithmetic path: XOR each B bit with F0, feed A and those bits into a 4-bit ripple carry adder, and use F0 as its carry-in. F0 = 0 adds, F0 = 1 subtracts.
3. Build the logic path: an AND gate and an OR gate per bit, and a 2:1 mux per bit that picks AND when F0 = 0 and OR when F0 = 1.
4. Choose the result: a second 2:1 mux per bit outputs the adder's sum when F1 = 0 and the logic result when F1 = 1. Probe these as R3 to R0, and the adder's last carry as Cout.
5. Add the zero flag: OR the four result bits and invert, Z = NOT (R0 OR R1 OR R2 OR R3). Try 0101 - 0101 with F1 F0 = 01: the result is 0000 and Z lights.

Function table with examples

When subtracting, Cout = 1 means no borrow (A was at least B) and Cout = 0 means A was smaller: 3 - 6 gives 1101, which is -3 in 4-bit two's complement. For AND and OR, Cout still shows the adder's carry for the current F0, so it is marked x (ignore it). Real ALUs add more operations (XOR, shifts, pass-through) by widening the function code and the final multiplexer, and set more flags such as overflow and negative.

You can also read the full theory in the lesson on the ALU. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

Frequently asked

How do you design a 4-bit ALU?

Compute every operation in parallel (an adder for ADD and SUB, AND and OR gates for the logic operations), then use multiplexers driven by a function code to select which result reaches the output. Subtraction reuses the adder by inverting B with XOR gates and setting the carry-in to 1.

How does an ALU subtract with an adder?

In two's complement, A - B = A + (NOT B) + 1. XOR gates controlled by the subtract signal invert every bit of B, and the same signal is fed in as the adder's carry-in to supply the +1.

What does the zero flag in an ALU do?

It is 1 when the result is all zeros, computed as NOT of the OR of the result bits. Processors use it for comparisons and loops: subtract two values and branch if the zero flag is set (they were equal).

What is the 74181?

A classic 4-bit ALU chip with 16 logic functions and 16 arithmetic operations selected by four function inputs plus a mode input, used in many 1970s minicomputer CPUs.