Full adder using two half adders and an OR gate, live
A full adder is two half adders and one OR gate. The first half adder adds A and B; the second adds that partial sum to the carry-in Cin and gives the final sum S; the OR gate combines the two half adders' carries into Cout.
A half adder adds two bits: its sum is A XOR B and its carry is A AND B. A full adder must add three bits, so it adds them two at a time. The first half adder gives P = A XOR B and C1 = A AND B. The second adds P and Cin, giving S = P XOR Cin = A XOR B XOR Cin and C2 = P AND Cin. A carry out happens when A and B are both 1 (C1) or when exactly one of them is 1 and Cin is 1 (C2), so Cout = C1 OR C2. The two carries are never 1 together: C1 = 1 needs A = B = 1, which makes P = 0 and so C2 = 0. That is why an OR is enough, and an XOR would work just as well. Each half adder block here is the verified half adder, saved as a part; open the circuit in the lab to look inside. The full adder from logic gates is exactly this circuit drawn gate by gate, five gates in all, and chaining full adders gives the ripple-carry adder. The same construction one subtraction over is the full subtractor from two half subtractors.
Open this circuit in the lab →
What you need
- 2× half adder: one XOR (sum) and one AND (carry) each
- 1× OR: Cout = C1 OR C2, the two half adders' carries
Step by step
- Place inputs
A,BandCin, two half adders, an OR gate, and probesSandCout. - Feed A and B into the first half adder. Its sum is the partial sum P = A XOR B, and its carry is C1 = A AND B.
- Feed P and Cin into the second half adder. Its sum is the final sum
S; its carry is C2 = P AND Cin. - OR C1 and C2 to get
Cout. - Check all eight rows: with A = B = Cin = 1, the first half adder carries, the second gives S = 1, and Cout = 1 (1 + 1 + 1 = 11 in binary).
Full adder using half adders: truth table
| A | B | Cin | P = A XOR B | C1 = AB | C2 = P Cin | S | Cout |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 |
C1 and C2 are never both 1, so Cout = C1 OR C2 never double counts. All eight rows of S and Cout are checked on the live circuit before the page is built.
You can also read the full theory in the lesson on the full adder. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
More builds: Arithmetic
All 246 build guides, by topic
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the full adder using two half adders in the lab →Frequently asked
How do you make a full adder using half adders?
Use two half adders and an OR gate. The first half adder adds A and B; the second adds its sum to Cin and gives the final sum S; the OR of the two carries is Cout.
How many half adders are needed to make a full adder?
Two, plus one OR gate for the carry. Each half adder is one XOR and one AND, so the full adder is five gates in total: two XOR, two AND and one OR.
Why is an OR gate used in a full adder made from half adders?
To combine the two carries. A carry out happens if A and B are both 1 or if their sum and Cin are both 1, and those two cases never happen at once, so OR (or XOR) merges them.
What are the sum and carry expressions of a full adder?
S = A XOR B XOR Cin and Cout = AB + Cin (A XOR B), which is the same as AB + BCin + ACin.
What is the difference between a half adder and a full adder?
A half adder adds two bits and has no carry input, so it fits only the lowest column. A full adder adds three bits, A, B and a carry-in, so full adders can be chained to add numbers of any width.