Full adder using a 3-to-8 decoder and OR gates, live

A full adder can be built from a 3-to-8 decoder and two OR gates: the decoder turns A, B and Cin into one active line, the minterm for that row, and each output ORs the minterms where it is 1: S = m1 + m2 + m4 + m7 and Cout = m3 + m5 + m6 + m7.

A 3-to-8 decoder is a minterm generator: for inputs A B Cin it raises exactly the line numbered A B Cin. So any function of three variables is an OR of some decoder lines, read straight off its truth table, with no simplification needed. For the full adder, the sum is 1 when an odd number of inputs are 1 (rows 1, 2, 4 and 7) and the carry when at least two are (rows 3, 5, 6 and 7). One decoder can feed both ORs, which is why this is a classic exercise: it shows that decoders plus ORs implement any combinational function. Compare the gate-level full adder from two half adders and the full adder from multiplexers.

Big circuit: pinch, scroll or tap + to zoom in, then drag to move around.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

Embed or cite this circuit

Free to embed on a course page, blog or worksheet: paste this code. The circuit stays live, and the small digiwleea badge links back here.

<iframe src="https://digiwleea.wleeaf.dev/embed/?c=H4sIAAAAAAAAA-2aS28bNxDHvwvPCrAcvnXrAwV6cYC2t8IHWdoYQuWVoUecIPB3L2QttTOa4S7jtDkEvkkL_vgY_jkzfHxRH7a7h8VBzdVqfb9-2rTt4t1yvVse1wc1Ux_b3X697dRcz1S3eGjVXH04bjbvFqtVu3u3apfbVbtTM9W1nw6_r9Rcg5updbc_LLplu1fzv7-o9UrN1VKrmfpn3Z1-r7vH46nu7W59v-7U_Iv6pObazdRnNTfpeaZ228Pi8NJqM1ObxV27UXP106k3i82xVfPmeZarhalqX2q1UKr1Z7FWU1UruFKtv6w7sV471Pu429611_VGf-5uLFX8pxoqc3WVgS_2cns8oPr8UF-3ZUOGcJ4fS2sb8DCK634iXAmPNbiDEp4GfNGtCp33xc7rpoYHU-R1DW91kYdRvh8-xCJvRnlrz-YLRd7W8OXJ166GL8--9jV82XyhBvepyMeq5ovq0-Py6_myfKBKfmX1A5LfdneNu3i2frl5qMB90fpgxvAAE3MPtqJ13RRxV4Ffu2qE-4rOs5m7namn9Q4HuCc4aXCRF2w6D_rU67s8izZ_u7T-BBFBQwEGGY-hxCHjMRQ4ZBoEuUEQmbloBCEaIbGIBIwARwJCchggjGE9AzyakD8hxCIklBBnMeIY4izvGWW8MKV4OCANB-tgKMAgTwYUOeSFKaVQ4t0jYwLgY7JYB0MBBgUsU6s5FBrePQpBnSHAYchw6GXxXrVEITuuIHBcQhbrAUaghCEvQEnoHYHC-MrLyQFeejbWzRJRnk0cogYPHHJNzSI3eGId9wum4UuJMlCzYg1WqjMMMcKKpQxWgnHcNdqGu0aHpTAUYJDDs-o8hxyWQs65CBR493xEkAn5G4KwFoYCHMICckmADO8egXwzZT0hGnnNIcCqs5C_IQjLYSjAIBIsveEQCZZWiLDe1k0uWRReUARZSbklAnluCItdl73sgRCEFWF1EXIaQ5FDTgvaI1CqMwQWRGgERtADRjQPSgawEzL5G4JIqDBFCPDMBsMhaPi6oJDl60KC8MQGxxlBDAQhgaKc13lihcAhj61gogAR7xCLUMBaCIlDQRAQgWJT54cC1nfUgu2c0BKBoM56QLpnOASaryQKWb6SJEjjIBMdh7TlY6KQr_N4Grv-GDiko9ASgQTvIBqCmDwJkDBPBEpNnfMi6VDSQktC4KRQpSJIqpsERdAkStgnJFvnihw2eXIcclFoiUBYEe48uQZDzuVvCCLJpCtCJMikyCEyT_mEgECJd88mAcLzpJuGUwGHDGfzN0xhTQwlGOUpBZwiOU4-uaAUVkUfph2Ogyblb5gicSMVKR8I5Tjlg9BDSmFheM-zjyAk_7oJnPJ4kn3M3zCFpTGUYBRJJXSTOEUSkL6HlNJkq9FwReXjb6IorbmiHJcGGZUWlCEwGghkOKSBT9YVZXn3tBcoIiftOAWCMEjSrLWvE6GjxggCJVmQUlEwoUAZOsWJU0bzcVEKGi5dElB7iZGAqkFzEUoUCVkagFMk0OUjP0oZ3kMStDJFpAuWC57Mcr6iCc-nE8X9-r5bbM5niv1d2_WlV__5-taq_3x17XQ7U8vtw-O2a7sDqfV8wZKvgW7e_6Vmar897pbtqV9fex947A7rw6Zd4VvA8LpLwLNgirdfk1eA4j2YgfFaf0N3YOgk--Nyya5hermUzpLx9d7Dds_w3imXcHSQ3ZVxXeTRSfa9cIfUd_76Dkc4ypZOsvHBSx_IcPrICeI68zfMCKeXIDBAFj32FPosF7wM-0-aRpAJxvef8MrliBYY2g72EbHUNUJYwWwkQfWC3yO5puAsQRiP5wzuW79EUpUbun2eqf3nh7vt5uJKjo-rxaFd_XR48QvLXXv5h7zT-WLrspZvfv1RvM5Ipdq--uHBN_sy5I066U4Z6r2R8BxApgVn4sdXRcPESrxPUyJiyfs0Fwvd0ZHGgu_pMwecA_RHy9oVXY8uQ03R91wKsL5RiGx2-XiAj4f4HsMRw81MnI_hdh58gux6cs9hajSej4aY4DLCb8iBiE86i73KJ3XUKd38D14J0ptXkr2SlGGl8QzLTWRYdtyn-XFcdGo6Fh45Se1H0b4DH6t4qHnmJKR4_Uoy128lBK9MvVlgOV5_iGWLvixcTHV3XUvJkxmGSK0Y3ooWzt_oLpwc2mkBEo5xaSLVH0Q2HAIoejP0LOsKIpefZAdelxlG7mmT4GjJ8UASvDN5fBE5BPz6lwa1hkdCsvEeCjCIbKHJvnsowHpHIVPXEmEsZxxPjwkipNQCgicIPFc2VZxwWESeCA0FGEQaipx5depeEz27rwifLw-mspd__8dbQv_dEnr-VO0tn3_L53_MfP5F63XpPHFIN_-9RzoZ8c0j1SbzE8elU8n8xHHpRDKvvWie-lzeT-TiE7l8foLwylxeo4d1X5XLV53XauGVjnhgW8zm806t4RBNmM0EBMIrHZrPC6908jcoerPEU_P8GqnszYKQz4eJfH4oMNFSHA-cwqmtkNALmwCaMTecoWm2FyD-oHN6EyDk8yIUpvL5wHtHIZLQWwHq7xlNKaUfCrCgSyEiBihC1HiBQ_TFsvByhmb1wtu1vKUov_u_FOB7juK7_6HA6J6DPPz_LnuOqRB_-_wvRynnJqg4AAA" width="100%" height="560" style="border:0;border-radius:12px;max-width:640px" title="Full adder using a decoder circuit (digiwleea)" loading="lazy"></iframe>

To cite it: digiwleea, “Full adder using a decoder”, https://digiwleea.wleeaf.dev/tools/build/full-adder-decoder/

What you need

1× 3-to-8 decoder (3 NOT, 12 AND): one line per minterm of A B Cin
3× OR: S = m1 + m2 + m4 + m7
3× OR: Cout = m3 + m5 + m6 + m7

Step by step

Place inputs A, B and Cin and a 3-to-8 decoder with A as the most significant select bit.
Write the full adder's truth table and note the rows where S is 1 (1, 2, 4, 7) and where Cout is 1 (3, 5, 6, 7).
OR decoder lines 1, 2, 4 and 7 into S, and lines 3, 5, 6 and 7 into Cout.
Step through all eight rows: exactly one decoder line is high, and the ORs pick out S and Cout.

Full adder truth table with minterms

Row (minterm)	A	B	Cin	S	Cout
m0	0	0	0	0	0
m1	0	0	1	1	0
m2	0	1	0	1	0
m3	0	1	1	0	1
m4	1	0	0	1	0
m5	1	0	1	0	1
m6	1	1	0	0	1
m7	1	1	1	1	1

All eight rows of the live circuit are checked before the page is built.

You can also read the full theory in the lesson on the full adder. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Arithmetic

full adder using two half adders Full subtractor using a decoder full adder 2-bit adder half adder 3-bit binary adder 8-bit ALU 4-bit incrementer 4-bit ALU 4-bit decrementer 1-bit ALU 4-bit ripple carry adder

All 246 build guides, by topic

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the Full adder using a decoder in the lab →

Frequently asked

How do you implement a full adder using a decoder?

Use a 3-to-8 decoder with A, B and Cin as its inputs. Its outputs are the eight minterms. OR together outputs 1, 2, 4 and 7 for the sum, and 3, 5, 6 and 7 for the carry out.

Why can a decoder implement any Boolean function?

Each decoder output is one minterm, so any function in sum-of-minterms form is just an OR of the decoder lines for the rows where the function is 1.

Can a full subtractor be built from a decoder too?

Yes, the same way: the difference is m1 + m2 + m4 + m7 (the same as the sum), and the borrow out is m1 + m2 + m3 + m7.