NMOS vs PMOS: the two transistors in every CMOS gate
NMOS and PMOS are the two kinds of MOSFET used in digital chips, and they are mirror images. An NMOS transistor conducts when its gate is high (a 1) and passes a strong 0 but only a weak 1 that falls a threshold voltage short of the supply. A PMOS transistor conducts when its gate is low (a 0) and passes a strong 1 but only a weak 0. An NMOS channel carries electrons and a PMOS channel carries holes, which move more slowly, so for the same drive a PMOS is made wider. CMOS, the logic family in nearly every modern chip, uses both: PMOS transistors in a pull-up network to the supply and NMOS transistors in a pull-down network to ground, with exactly one network on for any input. Remember one, and flip everything for the other: 0 and 1, strong and weak, up and down.
What each transistor is good at
NMOS is the natural pull-down: it switches on with a 1 and drags the output all the way to ground, and its faster electrons make it the stronger device for its size. PMOS is the natural pull-up: it switches on with a 0 and lifts the output all the way to the supply. Neither is good at the other's job, which is exactly why CMOS uses both and gets full-strength 0s and 1s with almost no current flowing once a gate settles.
See it live in digiwleea
In digiwleea you build with NMOS and PMOS switches directly. The MOSFET simulator shows a transistor in cross-section: drag the gate voltage and watch the channel form that connects source to drain; the NMOS and PMOS lessons explain the strong and weak values; and the CMOS NAND and CMOS NOR builds show the series and parallel pairs that make every gate. The lab is a switch-level simulator: each transistor is on or off and each wire is 0, 1 or floating, so it shows the logic exactly but does not calculate the threshold drop of a weak value; the lessons explain that part.
NMOS and PMOS side by side
| NMOS | PMOS | |
|---|---|---|
| Turns on when the gate is | 1 (high) | 0 (low) |
| Carriers in the channel | Electrons | Holes |
| Passes well | A strong 0 | A strong 1 |
| Passes poorly | A weak 1 (a threshold below the supply) | A weak 0 (a threshold above ground) |
| Place in a CMOS gate | Pull-down network, to ground | Pull-up network, to the supply |
| Size for equal drive | Narrower | Wider, because holes are slower |
| Two in series conduct when | Both gates are 1 | Both gates are 0 |
Put one of each between the supply and ground with their gates joined and you have the CMOS inverter: a 1 turns the NMOS on and the PMOS off, a 0 does the opposite, so exactly one of them conducts and the output is always driven.
No sign-up is needed to start: open the lab and place your first transistor, or read the free theory course. The account (and the AI tutor) are optional.
More comparisons: Digital logic concepts compared
See for yourself: build a logic gate from transistors in the simulator, then follow the path from sand to an 8-bit CPU.
Open the digiwleea lab →Frequently asked
What is the difference between NMOS and PMOS?
An NMOS transistor turns on when its gate is 1 and passes a strong 0; a PMOS transistor turns on when its gate is 0 and passes a strong 1. NMOS uses electrons as carriers, PMOS uses holes.
Why is PMOS used for pull-up and NMOS for pull-down?
Each passes one value strongly: PMOS passes a full 1 and NMOS a full 0. Placing PMOS between the output and the supply, and NMOS between the output and ground, gives full-strength outputs in both directions.
Why are PMOS transistors wider than NMOS?
Holes, the carriers in a PMOS channel, move more slowly than electrons, so a PMOS of the same width drives less current. Making it wider balances the rising and falling speeds of a gate.
Is NMOS on when the gate is 1?
Yes. An NMOS conducts when its gate is high. A PMOS is the opposite: it conducts when its gate is low.
How many transistors are in a CMOS NAND gate?
Four: two PMOS in parallel in the pull-up and two NMOS in series in the pull-down.