Half adder using a 2-to-4 decoder, live

A half adder can be built from a 2-to-4 decoder and one OR gate. The decoder turns A and B into the four minterms Y0 to Y3; the sum S = A XOR B is 1 for minterms 1 and 2, so S = Y1 + Y2, and the carry C = A AND B is minterm 3, so C = Y3.

A decoder produces every minterm of its inputs at once, one output line per row of the truth table, so any function of those inputs is just an OR of the right lines. That makes a decoder plus OR gates a universal way to build combinational logic straight from a truth table, no simplification needed. For the half adder, the sum is 1 on rows 01 and 10 and the carry only on row 11, so the carry needs no gate at all. The decoder here is the verified 2-to-4 decoder with enable, saved as a part, with its enable tied to 1. The same method with a 3-to-8 decoder builds the full adder using a decoder and the full subtractor using a decoder; the gate version is the half adder with one XOR and one AND.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

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Free to embed on a course page, blog or worksheet: paste this code. The circuit stays live, and the small digiwleea badge links back here.

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To cite it: digiwleea, “half adder using a decoder”, https://digiwleea.wleeaf.dev/tools/build/half-adder-decoder/

What you need

1× 2-to-4 decoder: A on A1, B on A0, enable tied to 1: outputs the minterms Y0 to Y3
1× OR: S = Y1 + Y2

Step by step

Place inputs A and B, a 2-to-4 decoder and probes S and C.
Wire A to the decoder's A1, B to A0, and tie its enable high.
OR the outputs Y1 and Y2 into S.
Wire Y3 straight to C.
Try all four rows: exactly one decoder output is 1 each time, and S and C follow the half adder truth table.

Half adder using a decoder: truth table

A	B	Decoder line that is 1	S = Y1 + Y2	C = Y3
0	0	Y0	0	0
0	1	Y1	1	0
1	0	Y2	1	0
1	1	Y3	0	1

All four rows are checked on the live circuit before the page is built.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Arithmetic

4-bit carry-save adder half adder using 2:1 multiplexers 8-bit Brent-Kung adder full adder using 4:1 multiplexers 4-bit Kogge-Stone adder full adder using 8:1 multiplexers 4-bit carry-skip adder full subtractor using 4:1 multiplexers 4-bit carry-select adder serial adder 4-bit carry lookahead generator half subtractor

All 246 build guides, by topic

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the half adder using a decoder in the lab →

Frequently asked

How do you implement a half adder using a decoder?

Feed A and B to a 2-to-4 decoder. The sum is the OR of the minterm lines 1 and 2 (S = Y1 + Y2), and the carry is minterm 3 (C = Y3).

What size decoder does a half adder need?

A 2-to-4 decoder, because a half adder has two inputs and so four minterms. A full adder, with three inputs, needs a 3-to-8 decoder.

Why can a decoder implement any combinational circuit?

Because its outputs are all the minterms of its inputs. Any Boolean function is a sum of minterms, so ORing the right decoder outputs gives it directly.