IRSIM alternative: switch-level simulation in your browser

IRSIM is a switch-level simulator for digital circuits: as its page at Open Circuit Design puts it, it treats transistors as ideal switches, and uses extracted capacitance and lumped resistance to predict the relative timing of events. It was developed at Stanford and shares a history with the Magic layout editor from Berkeley: Magic writes the .sim netlist format that IRSIM reads, so IRSIM is typically used to check the digital behavior of a layout, and scheduling commands with Tcl scripting make it practical for testbenches. Version 9.7 is maintained by Tim Edwards; the stable source release 9.7.121 is dated November 13, 2025, with a GitHub mirror and a Cygwin build for Windows. digiwleea is also a switch-level simulator, built for learning rather than for checking layouts, and it runs in the browser.

What IRSIM is good at

Quickly confirming that a real chip layout works at the digital level. Because it reads circuits extracted from layout, with their capacitances and resistances, it can catch logic and timing problems much faster than full SPICE, and its Tcl scripting makes long testbenches practical; its author describes using it to validate production chips. Paired with Magic, it is a free, long-standing open-source flow for VLSI design (see Magic vs Electric). (digiwleea is an independent project, not affiliated with Open Circuit Design.)

How digiwleea is different

digiwleea uses the same idea, transistors as switches, but works from schematics you draw rather than extracted layouts, and it has no RC timing: each change settles at once, so you see the logic, not the delays. In exchange there is nothing to install or script: you click inputs and watch every wire in the browser, build NOT and NAND from NMOS and PMOS, and go up through adders, latches, registers, RAM and an 8-bit CPU, through a 40+ level course where every part is checked against its truth table, with an AI tutor (Wleea). For checking a Magic layout, IRSIM is the tool.

	IRSIM	digiwleea
Model	Switch level, with RC timing from extracted values	Switch level, zero delay (each step settles at once)
Input	.sim netlists, usually extracted from Magic layouts	Schematics you draw in the browser
Driving it	Commands and Tcl testbench scripts	Clicking inputs; truth tables and timelines
Runs on	Unix-like systems; Windows via Cygwin	Any modern browser, nothing to install
Price	Free and open source	Free lab and Act I; Premium for the full course

No sign-up is needed to start: open the lab and place your first transistor, or read the free theory course. The account (and the AI tutor) are optional.

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See for yourself: build a logic gate from transistors in the simulator, then follow the path from sand to an 8-bit CPU.

Open the digiwleea lab →

Frequently asked

What is a switch-level simulator?

A simulator that models each transistor as an on or off switch, rather than solving its currents and voltages as SPICE does. It is much faster than analog simulation and still captures how transistors make logic, including floating and conflicting nodes.

What is IRSIM used for?

Checking the digital behavior and approximate timing of chip layouts, usually ones drawn in the Magic VLSI editor, whose extracted .sim netlists IRSIM reads.

Is there an online switch-level simulator?

Yes. digiwleea simulates circuits at the switch level in the browser: you build gates from NMOS and PMOS transistors and watch every wire's value as you click the inputs.