KLayout and digiwleea: from the logic of a chip to its layout

KLayout is a free layout viewer and editor for integrated-circuit mask layouts, by Matthias Koefferlein, published under the GPL (version 2 or later). It opens GDS and OASIS files quickly, even huge ones, edits hierarchical layouts, and is scriptable in Ruby and Python with a built-in development environment, which is how it generates parametric cells and runs design-rule checks (DRC), layout-versus-schematic checks (LVS), XOR comparisons and layout diffs. It has installers for Windows, packages for macOS and Ubuntu, and source on GitHub; version 0.30.12 came out in August 2026. KLayout shows and checks the geometry of a chip; digiwleea shows the logic that geometry implements.

What KLayout is good at

Fast, scriptable work with real layout data: viewing a full chip's GDS, measuring and searching it, running DRC and LVS decks, and generating layout from Python or Ruby. It is a common companion to open-source chip flows and to tools such as Magic; for drawing your first CMOS layouts in a class, Microwind is another option. (digiwleea is an independent project, not affiliated with KLayout.)

How digiwleea is different

digiwleea comes before the layout. In the browser you wire NMOS and PMOS transistors as switches into a CMOS inverter and NAND and NOR gates, then build adders, latches, registers and an 8-bit CPU from them, with every node shown as 0, 1 or floating and every part checked against its truth table, through a 40+ level course with an AI tutor (Wleea). It has no geometry, layers or mask files: use it to understand what a cell does, and KLayout to see how it is drawn.

	KLayout	digiwleea
Works with	Mask layouts (GDS, OASIS)	Logic circuits, from transistors up
Checks	DRC, LVS, XOR, layout diff	Truth tables and simulated behaviour
Scripting	Ruby and Python	None needed
Runs on	Windows, macOS, Linux (desktop)	Any modern browser
Price	Free, open source (GPL v2 or later)	Free lab and Act I; Premium for the full course

No sign-up is needed to start: open the lab and place your first transistor, or read the free theory course. The account (and the AI tutor) are optional.

More comparisons: HDL, FPGA and chip design tools

Cadence Virtuoso alternative Tiny Tapeout Magic VLSI vs Electric VLSI Verilog vs VHDL IRSIM alternative Verilog vs SystemVerilog Microwind alternative Blocking vs nonblocking Icestudio alternative Python and Scala HDLs compared Yosys alternative WaveDrom alternative

See for yourself: build a logic gate from transistors in the simulator, then follow the path from sand to an 8-bit CPU.

Open the digiwleea lab →

Frequently asked

What is KLayout used for?

Viewing and editing integrated-circuit mask layouts in GDS and OASIS format, and checking them with design-rule (DRC) and layout-versus-schematic (LVS) scripts.

Is KLayout free?

Yes. KLayout is free and open source under the GNU GPL, version 2 or later.

Can KLayout simulate a circuit?

No. KLayout works with layout geometry and its checks. To see what a circuit does, simulate it: SPICE for analog behaviour, or a logic simulator such as digiwleea for digital behaviour.

Does digiwleea work with GDS files?

No. digiwleea simulates logic at the switch level and has no layout or mask data.