SOP vs POS: one function as AND-OR, OR-AND, NAND-NAND and NOR-NOR, live
Sum of products (SOP) writes a function as an OR of AND terms, one per group of 1s in its truth table; product of sums (POS) writes it as an AND of OR terms, one per group of 0s. This live circuit builds one function, F = Σm(1, 3, 6, 7), four ways: the SOP A'C + AB as AND-OR and as NAND-NAND, and the POS (A + C)(A' + B) as OR-AND and as NOR-NOR. All four outputs agree on every row.
The 1 rows are 001, 011, 110 and 111. The first two share A = 0 and C = 1, giving the term A'C; the last two share A = 1 and B = 1, giving AB. So F = A'C + AB. The 0 rows are 000, 010, 100 and 101, which group into A'C' and AB', so F' = A'C' + AB', and De Morgan's law turns that into F = (A + C)(A' + B). Two-level circuits convert to one gate type: an AND-OR circuit becomes NAND-NAND by replacing every gate with a NAND, and an OR-AND circuit becomes NOR-NOR the same way, which is why NAND and NOR are called universal. Look at the result once more: when A = 0, F = C, and when A = 1, F = B. This function is a 2-to-1 multiplexer with A as the select line. Its NAND-NAND form is exactly the multiplexer built from NAND gates. To find terms like these for your own function, use the K-map solver.
Open this circuit in the lab →
What you need
- 1× NOT: A', shared by all four forms
- 2× AND: the SOP terms A'C and AB
- 1× OR: SOP: A'C + AB
- 2× OR: the POS terms A + C and A' + B
- 1× AND: POS: (A + C)(A' + B)
- 3× NAND: NAND-NAND: NAND(NAND(A', C), NAND(A, B))
- 3× NOR: NOR-NOR: NOR(NOR(A, C), NOR(A', B))
Step by step
- Write the truth table and list the 1 rows (minterms 1, 3, 6, 7) and the 0 rows (maxterms 0, 2, 4, 5).
- Group the 1s into product terms:
F = A'C + AB. Build it with two ANDs and an OR. - Group the 0s into F' = A'C' + AB' and complement with De Morgan:
F = (A + C)(A' + B). Build it with two ORs and an AND. - Replace every gate of the SOP circuit with a NAND, and every gate of the POS circuit with a NOR. The outputs do not change.
- Sweep A B C from 000 to 111: SOP, POS, NAND and NOR light together on rows 1, 3, 6 and 7.
Truth table: all four forms agree
| A | B | C | A'C | AB | A + C | A' + B | SOP | POS | NAND | NOR |
|---|---|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
| 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
A'C and AB are the SOP product terms; A + C and A' + B are the POS sum terms. Before the page is built, all eight rows are run through the circuit and every output is checked against F = Σm(1, 3, 6, 7).
You can also read the full theory in the lesson on canonical forms (SOP and POS). Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
More builds: Universal gates: NAND only, NOR only
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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the SOP vs POS circuits in the lab →Frequently asked
What is the difference between SOP and POS?
Sum of products (SOP) is an OR of AND terms and is read from the rows where the output is 1. Product of sums (POS) is an AND of OR terms and is read from the rows where the output is 0. Both describe the same function; they differ in which gates the circuit uses and how many terms it needs.
How do you convert SOP to POS?
Take the rows where F is 0, write F' as a sum of products for those rows, then apply De Morgan's law to complement it. Here F' = A'C' + AB', so F = (A + C)(A' + B). Equivalently, the minterms 1, 3, 6, 7 become the maxterms 0, 2, 4, 5.
What is NAND-NAND implementation?
A two-level SOP circuit built only from NAND gates: replace every AND and the final OR with NANDs. It computes the same function because NAND(NAND(x, y), NAND(z, w)) = xy + zw by De Morgan's law. Here NAND(NAND(A', C), NAND(A, B)) = A'C + AB.
What is NOR-NOR implementation?
The POS counterpart: replace every OR and the final AND of a two-level POS circuit with NORs. NOR(NOR(x, y), NOR(z, w)) = (x + y)(z + w), so NOR(NOR(A, C), NOR(A', B)) = (A + C)(A' + B).
When should I use SOP or POS?
Use whichever needs fewer or smaller terms: SOP groups the 1s of a K-map and POS groups the 0s, so a function with few 0s is often simpler as POS. NAND-only logic suits SOP and NOR-only logic suits POS. This function needs two terms either way.
What are minterms and maxterms?
A minterm is an AND term that is 1 on exactly one row of the truth table; a maxterm is an OR term that is 0 on exactly one row. The canonical SOP is the OR of the minterms where F = 1, and the canonical POS is the AND of the maxterms where F = 0.