How to build a full subtractor using only NAND gates

A full subtractor can be built from nine NAND gates: two 4-NAND XORs give the difference D = A XOR B XOR Bin, and one more NAND combines two signals the XORs already make into the borrow Bout = A'B + (A XNOR B) Bin.

The first XOR stage computes X = A XOR B and, on the way, N3 = NAND(B, N1) = NOT (A'B), the inverted borrow of A minus B. The second stage computes D = X XOR Bin, and its third gate N6 = NAND(Bin, NAND(X, Bin)) equals NOT (X' AND Bin), the inverted borrow caused by the incoming borrow when A and B are equal. NANDing two inverted terms ORs them (De Morgan), so Bout = NAND(N3, N6). It mirrors the full adder from NAND gates: the same two XOR stages, with the borrow taken from the third gate of each stage where the adder takes its carry from the first. See also the full subtractor from XOR, AND, OR and NOT and the NAND half subtractor.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

4× NAND: first XOR: X = A XOR B (its third gate is N3 = NOT (A'B))
4× NAND: second XOR: D = X XOR Bin (its third gate is N6 = NOT (X' Bin))
1× NAND: Bout = NAND(N3, N6)

Step by step

Place inputs A, B and Bin.
Build X = A XOR B: N1 = NAND(A, B), N2 = NAND(A, N1), N3 = NAND(B, N1), X = NAND(N2, N3).
Build D = X XOR Bin the same way: N4 = NAND(X, Bin), N5 = NAND(X, N4), N6 = NAND(Bin, N4), D = NAND(N5, N6).
The borrow: Bout = NAND(N3, N6). N3 is NOT (A'B) and N6 is NOT (X' Bin), so NANDing them ORs the two borrow terms.
Probe D and Bout and check all eight rows against the table below.

Full subtractor truth table

A	B	Bin	D	Bout
0	0	0	0	0
0	0	1	1	1
0	1	0	1	1
0	1	1	0	1
1	0	0	1	0
1	0	1	0	0
1	1	0	0	0
1	1	1	1	1

Each row computes A minus B minus Bin: D is the result bit and Bout is 1 when the result went below zero and had to borrow 2 from the next column. All eight rows are checked against that arithmetic before the page is built. Chain n of these, each Bout into the next Bin, and you get an n-bit ripple-borrow subtractor.

You can also read the full theory in the lesson on the full subtractor. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the full subtractor from NAND gates in the lab →

Frequently asked

How many NAND gates are needed for a full subtractor?

Nine: two 4-NAND XOR stages for the difference, and one NAND that combines the third gate of each stage into the borrow-out.

What are the full subtractor equations?

D = A XOR B XOR Bin and Bout = A'B + (A XNOR B) Bin, which also expands to A'B + A'Bin + B Bin.

How is a NAND full subtractor different from a NAND full adder?

The difference and the sum are the same circuit, a three-input XOR. Only the second output changes: the adder takes its carry from the first gate of each XOR stage, the subtractor its borrow from the third.

Do processors use subtractor circuits?

Usually not as separate circuits. A processor subtracts by adding the two's complement: it inverts B and sets the adder's carry-in to 1, so one adder does both jobs.