How to build a traffic light controller (state machine)

A traffic light controller is a finite state machine that steps through the light phases on a clock. This one runs a two-road junction with four states (north-south green, north-south yellow, east-west green, east-west yellow), stored in two flip-flops, and every light is decoded from the state.

It is a Moore machine: the lights depend only on the stored state, never directly on an input, so they change only on clock edges and cannot glitch. The next-state logic is just a 2-bit synchronous counter with a clear, and the output logic is six small gates. Safety is built into the decoding: north-south can only be green or yellow when Q1 = 0, east-west only when Q1 = 1, so both roads can never show green at once. A real controller holds green much longer than yellow, adds an all-red gap, and listens to car sensors and pedestrian buttons; you get those by adding states, a timer that counts several clocks per state, and inputs to the next-state logic, exactly as in the sequence detector. Here every phase lasts one clock to keep the circuit small. In the live circuit the clock is already running: turn CLR on and off once, then watch the lights cycle.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

2× D flip-flop: the state Q1 Q0, on one clock
1× NOT: D0 = NOT Q0 (bit 0 toggles every clock)
1× XOR: D1 = Q1 XOR Q0
2× AND: clear: each D ANDed with NOT CLR
1× NOR: NS green = NOT (Q1 OR Q0)
3× AND: NS yellow = NOT Q1 AND Q0, EW green = Q1 AND NOT Q0, EW yellow = Q1 AND Q0
2× NOT: NOT CLR and NOT Q1 (which is also EW red)

Step by step

List the states and give each a code: NS green 00, NS yellow 01, EW green 10, EW yellow 11 (Q1 Q0). The sequence is simply counting.
Build the next-state logic as a 2-bit counter: D0 = NOT Q0, D1 = Q1 XOR Q0, each ANDed with NOT CLR so CLR returns to NS green.
Decode each light from the state: NSG = NOT (Q1 OR Q0), NSY = NOT Q1 AND Q0, NSR = Q1, EWG = Q1 AND NOT Q0, EWY = Q1 AND Q0, EWR = NOT Q1.
Probe all six lights, pulse CLR, and check that exactly one light per road is on at every step and that the roads alternate.

State table

State	Q1 Q0	North-south	East-west	Next state
1	00	green	red	01
2	01	yellow	red	10
3	10	red	green	11
4	11	red	yellow	00

Before the page is built all six lights are checked at every one of 10 clocks: a clear, the full cycle twice over, and a second clear in the middle of a cycle that returns straight to north-south green.

You can also read the full theory in the lesson on finite state machines. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adder full adder half subtractor full subtractor 2:1 multiplexer 4:1 multiplexer XOR gate from NAND gates 2-to-4 decoder SR latch D flip-flop JK flip-flop T flip-flop 4-bit shift register 4-bit ripple carry adder D latch 1-to-4 demultiplexer 4-bit magnitude comparator 4-bit ring counter 4-bit Johnson counter 4-to-2 priority encoder 4-bit synchronous counter 3-to-8 decoder 8-to-1 multiplexer 4-bit carry lookahead adder half adder from NAND gates 2-bit comparator BCD to 7-segment decoder 4-bit up/down counter decade counter 2-bit multiplier 4-bit ALU 4-bit array multiplier NOT, AND, OR and NOR from NAND NOT, OR, AND and XOR from NOR full adder from NAND gates SR latch from NAND gates parity generator and checker 4-bit adder/subtractor BCD adder 4-bit universal shift register mod-6 counter 4-bit ripple counter binary to Gray code converter half adder from NOR gates full adder from NOR gates 4-bit register with parallel load 1011 sequence detector binary to BCD converter D flip-flop from NAND gates 1-bit ALU CMOS inverter CMOS NAND gate CMOS NOR gate PISO shift register SR flip-flop from NAND gates BCD to excess-3 code converter Hamming (7,4) code encoder and corrector 4-bit barrel shifter CMOS AND gate CMOS OR gate CMOS XOR gate 1-bit magnitude comparator half subtractor from NAND gates full subtractor from NAND gates 8-to-3 encoder Gray to binary converter 4-to-16 decoder

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the traffic light controller in the lab →

Frequently asked

How does a traffic light controller work?

It is a finite state machine: flip-flops hold the current phase, next-state logic decides the following phase on each clock edge, and output logic turns the state into the individual lights.

Is a traffic light controller a Moore or a Mealy machine?

Usually Moore, as here: the lights are a function of the state alone, so they change only on clock edges. Inputs such as car sensors affect the next state, not the outputs directly.

How many flip-flops does a traffic light controller need?

One per state bit: 2 flip-flops give 4 states, which is enough for the four basic phases of a two-road junction. More phases, such as all-red gaps or a pedestrian phase, need 3 flip-flops.

How do you make the green light last longer than yellow?

Either give green several states in a row, or add a timer (a counter) that the controller waits on before it leaves the green state, loading a different count for each phase.