ModelSim alternatives: Questa Starter, open-source HDL simulators and a visual lab
ModelSim is an HDL simulator for VHDL and Verilog from Siemens EDA (formerly Mentor Graphics), and its free ModelSim-Intel FPGA Starter Edition was the simulator that came with Intel's Quartus Prime. In Altera's tools it has since been replaced by Questa: Altera's page for the Questa Altera FPGA Edition talks about moving from ModelSim FPGA Edition, and lists a free Questa Altera FPGA Starter Edition with no line limitations, about 40% of the full edition's performance on average, mixed-language Verilog/SystemVerilog, VHDL and SystemC support, and a free one-year license from Altera's Self Service Licensing Center that you renew every year. Siemens' old ModelSim product page now redirects to its Questa One Sim page. To simulate HDL for an Altera FPGA, use Questa Starter; to simulate HDL with no license at all, use an open-source simulator; to see the logic itself, wire it in digiwleea.
What ModelSim and Questa are good at
Industrial HDL simulation: mixed-language designs, testbenches, waveform debugging, behavioral and gate-level simulation, and precompiled libraries for Altera devices, launched straight from Quartus Prime (all listed on Altera's Questa page). If your course or project targets an Altera FPGA, the free Questa Starter Edition is the direct successor to the ModelSim you may have used. Without any license, Icarus Verilog and Verilator simulate Verilog and GHDL simulates VHDL, compared on our Icarus Verilog vs Verilator vs GHDL page, and EDA Playground runs several simulators in the browser after you log in. (digiwleea is an independent project, not affiliated with Siemens or Altera.)
How digiwleea is different
digiwleea does not simulate HDL code. It is a visual logic lab: in the browser you place transistors, gates and wires and watch every signal settle, building adders, latches, registers, RAM and an 8-bit CPU that runs a stored program, through a 40+ level course where every part is checked against its truth table, with an AI tutor (Wleea). It meets HDL halfway: the lab exports a circuit as VHDL and can build a combinational circuit from a short VHDL description, and the free Verilog and VHDL lessons describe the course circuits in code, testbenches included. Run your HDL in Questa or an open-source simulator; use digiwleea to see what it means in gates.
| ModelSim | digiwleea | |
|---|---|---|
| Simulates | VHDL, Verilog/SystemVerilog and SystemC code | Circuits you wire, from transistors up |
| Free version | Questa Starter, with a free license renewed every year | Free lab and Act I, no license or install |
| Runs on | A desktop install, alongside Quartus Prime | Any modern browser |
| Waveforms | Waveform debugging GUI | Built-in waveform view |
| Best for | FPGA design and verification | Learning how the logic works |
No sign-up is needed to start: open the lab and place your first transistor, or read the free theory course. The account (and the AI tutor) are optional.
More comparisons: HDL, FPGA and chip design tools
See for yourself: build a logic gate from transistors in the simulator, then follow the path from sand to an 8-bit CPU.
Open the digiwleea lab →Frequently asked
Is ModelSim still free?
The free ModelSim-Intel FPGA Starter Edition has been replaced by the Questa Altera FPGA Starter Edition. It is still free, but it needs a one-year license from Altera's Self Service Licensing Center, renewed each year.
What is the difference between ModelSim and Questa?
Both are Siemens EDA HDL simulators. Questa is the newer, more capable line, and in Altera's FPGA tools Questa replaced ModelSim; Siemens' ModelSim product page now leads to Questa One Sim.
What is a free alternative to ModelSim?
For Verilog, Icarus Verilog or Verilator; for VHDL, GHDL. All three are open source and need no license. EDA Playground runs several simulators in the browser after you log in. To see circuits rather than code, use a visual logic simulator such as digiwleea.
Does digiwleea simulate Verilog or VHDL?
No. digiwleea simulates circuits you wire. It can export a circuit as VHDL and build a combinational circuit from a short VHDL description, and its Verilog and VHDL lessons show the same circuits in code.