4-to-16 decoder using 2-to-4 decoders: five decoders, live

A 4-to-16 decoder can be built from five 2-to-4 decoders with enable inputs: a first decoder takes the top bits A3 A2 and enables exactly one of four output decoders, and each of those decodes A1 A0 into four of the sixteen outputs Y0 to Y15.

This is decoder expansion in two levels, a small tree. The first-level decoder has its enable tied to 1, so one of its outputs is always high: output k when A3 A2 equals k. That output is the enable of second-level decoder k, which turns on output Y(4k + A1A0). The other three second-level decoders are disabled and hold all their outputs at 0, so exactly one of the sixteen outputs is 1. The 2-to-4 decoder with enable is saved as a part and checked on its own first (each output is EN AND one minterm of its two address bits), then all sixteen addresses are checked on the whole circuit. One size smaller, two of these decoders make the 3-to-8 decoder from 2-to-4 decoders, and the 4-to-16 decoder page builds the same function from predecoders and AND gates. The live circuit starts at 0000, so Y0 is lit.

Big circuit: pinch, scroll or tap + to zoom in, then drag to move around.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

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Free to embed on a course page, blog or worksheet: paste this code. The circuit stays live, and the small digiwleea badge links back here.

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To cite it: digiwleea, “4-to-16 decoder from 2-to-4 decoders”, https://digiwleea.wleeaf.dev/tools/build/decoder-4to16-from-2to4/

What you need

1× 2-to-4 decoder with enable: first level: A3 A2 select one of four enables; its own EN is tied to 1
4× 2-to-4 decoder with enable: second level: A1 A0 into Y0 to Y3, Y4 to Y7, Y8 to Y11 and Y12 to Y15

Step by step

Place inputs A3, A2, A1, A0 and sixteen probes Y0 to Y15.
Wire A3 and A2 to the two address inputs of the first decoder and tie its enable to 1.
Wire A1 and A0 to the address inputs of all four second-level decoders.
Connect output k of the first decoder to the enable of second-level decoder k, for k = 0 to 3. Decoder k drives Y4k to Y4k+3.
Count the inputs from 0000 to 1111: exactly one output is 1 each time, moving from Y0 to Y15.

4-to-16 decoder from 2-to-4 decoders: truth table

A3	A2	A1	A0	Enabled decoder	Output that is 1
0	0	0	0	decoder 0	Y0
0	0	0	1	decoder 0	Y1
0	0	1	0	decoder 0	Y2
0	0	1	1	decoder 0	Y3
0	1	0	0	decoder 1	Y4
0	1	0	1	decoder 1	Y5
0	1	1	0	decoder 1	Y6
0	1	1	1	decoder 1	Y7
1	0	0	0	decoder 2	Y8
1	0	0	1	decoder 2	Y9
1	0	1	0	decoder 2	Y10
1	0	1	1	decoder 2	Y11
1	1	0	0	decoder 3	Y12
1	1	0	1	decoder 3	Y13
1	1	1	0	decoder 3	Y14
1	1	1	1	decoder 3	Y15

All sixteen input rows, with all sixteen outputs each, are checked on the live circuit before the page is built. The enabled decoder is the second-level one chosen by A3 A2. The other common construction uses two 3-to-8 decoders, enabled by A3 and NOT A3; the three enable inputs of the 74LS138 exist for exactly that kind of expansion.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Selecting, routing and decoding

3-to-8 decoder from two 2-to-4 decoders programmable logic array (PLA)3-to-8 decoder 4-to-16 decoder 2-to-4 decoder with enable 4-to-2 encoder 2-to-4 decoder 8-to-3 encoder 1-to-32 demultiplexer from 1-to-8 demuxes 4-to-2 priority encoder 1-to-16 demultiplexer 8-to-3 priority encoder

All 246 build guides, by topic

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 4-to-16 decoder from 2-to-4 decoders in the lab →

Frequently asked

How many 2-to-4 decoders are needed to make a 4-to-16 decoder?

Five: four decoders for the sixteen outputs and one more, driven by A3 and A2, that enables one of the four at a time.

How do you construct a 4-to-16 decoder using 2-to-4 decoders?

Feed A1 and A0 to four 2-to-4 decoders with enable inputs; they give Y0 to Y3, Y4 to Y7, Y8 to Y11 and Y12 to Y15. Decode A3 and A2 with a fifth 2-to-4 decoder whose enable is tied on, and use its four outputs as the four enables.

How many 3-to-8 decoders make a 4-to-16 decoder?

Two, plus an inverter: A2, A1 and A0 go to both, A3 enables the upper decoder and NOT A3 enables the lower one.

Why do the decoders need enable inputs?

A disabled decoder holds all its outputs at 0 whatever its address. That lets four decoders share A1 and A0 while only the one chosen by A3 A2 drives an output high.