2-to-4 decoder with enable: truth table, live

A 2-to-4 decoder with enable turns a 2-bit address A1 A0 into one active output out of four, Y0 to Y3, but only while the enable input EN is 1; with EN = 0 every output is 0. Each output is EN AND one minterm of A1 A0, for example Y2 = EN AND A1 AND NOT A0.

The enable is what lets decoders be combined. Several decoders can share the same address lines while only the enabled one drives an output high, which is how two of them make a 3-to-8 decoder and five make a 4-to-16 decoder, and putting a data signal on EN turns the decoder into a 1-to-4 demultiplexer. This is the same verified circuit those pages save as a part. Compare the plain 2-to-4 decoder, which has no enable. The live circuit opens with EN = 1 and the address 00, so Y0 is lit.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

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Free to embed on a course page, blog or worksheet: paste this code. The circuit stays live, and the small digiwleea badge links back here.

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To cite it: digiwleea, “2-to-4 decoder with enable”, https://digiwleea.wleeaf.dev/tools/build/decoder-2to4-enable/

What you need

2× NOT: NOT A1 and NOT A0
4× AND: the four minterms of A1 A0
4× AND: each minterm ANDed with EN

Step by step

Place inputs EN, A1, A0 and probes Y0 to Y3.
Invert A1 and A0.
Make the four minterms with AND gates: NOT A1 NOT A0, NOT A1 A0, A1 NOT A0 and A1 A0.
AND each minterm with EN and probe the results as Y0 to Y3.
With EN = 1, count A1 A0 from 00 to 11: one output lights at a time. Set EN = 0: all four go dark.

2-to-4 decoder with enable: truth table

EN	A1	A0	Y0	Y1	Y2	Y3
0	x	x	0	0	0	0
1	0	0	1	0	0	0
1	0	1	0	1	0	0
1	1	0	0	0	1	0
1	1	1	0	0	0	1

x means either value. All eight combinations of EN, A1 and A0 are checked on the live circuit before the page is built. Decoder chips usually make the enable active low, so the outputs are on when an enable pin is 0; the 74HC139 is a dual 2-to-4 decoder of that kind.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Selecting, routing and decoding

2-to-4 decoder 3-to-8 decoder 1-to-32 demultiplexer from 1-to-8 demuxes 3-to-8 decoder from two 2-to-4 decoders 1-to-16 demultiplexer 4-to-16 decoder from 2-to-4 decoders 1-to-8 demultiplexer programmable logic array (PLA)1-to-4 demultiplexer 4-to-16 decoder 1-to-2 demultiplexer 4-to-2 encoder

All 246 build guides, by topic

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 2-to-4 decoder with enable in the lab →

Frequently asked

What does the enable input of a 2-to-4 decoder do?

When EN is 1 the decoder works normally and the output selected by A1 A0 is 1. When EN is 0 all four outputs are 0, whatever the address.

How do you add an enable to a decoder?

AND every output with the enable signal. Here each output is EN AND one minterm of the address, so a 2-to-4 decoder with enable needs four extra AND inputs, or three-input ANDs.

How is a 2-to-4 decoder with enable used as a demultiplexer?

Put the data signal on EN. The selected output then copies the data and the other three stay 0, which is exactly a 1-to-4 demultiplexer.

What is the truth table of a 2-to-4 decoder with enable?

With EN = 0 all outputs are 0. With EN = 1: A1 A0 = 00 gives Y0 = 1, 01 gives Y1 = 1, 10 gives Y2 = 1 and 11 gives Y3 = 1, with the other outputs 0.