3-to-8 decoder using two 2-to-4 decoders, live

A 3-to-8 decoder can be built from two 2-to-4 decoders with enable inputs. A1 and A0 go to both decoders, and the top bit A2 picks which one is enabled: NOT A2 enables the one for Y0 to Y3, A2 enables the one for Y4 to Y7.

This is decoder expansion, the standard way to build a wide decoder from small ones. Each 2-to-4 decoder decodes the low two bits; its enable input forces all four of its outputs to 0 when it is off. With A2 = 0 only the lower decoder is on, so exactly one of Y0 to Y3 is 1; with A2 = 1 only the upper one is on, giving one of Y4 to Y7. The enable decoder here is saved as a part and checked on its own first: each output is EN AND one minterm of A1 A0. The same trick scales: two 3-to-8 decoders and one inverter make a 4-to-16 decoder. Compare it with the flat 3-to-8 decoder from gates and the 74LS138 chip, whose three enable inputs exist for exactly this kind of expansion.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

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Free to embed on a course page, blog or worksheet: paste this code. The circuit stays live, and the small digiwleea badge links back here.

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To cite it: digiwleea, “3-to-8 decoder from two 2-to-4 decoders”, https://digiwleea.wleeaf.dev/tools/build/decoder-3to8-from-2to4/

What you need

2× 2-to-4 decoder with enable: lower half Y0 to Y3, upper half Y4 to Y7
1× NOT: NOT A2, the enable of the lower decoder

Step by step

Place inputs A2, A1, A0 and eight probes Y0 to Y7.
Wire A1 and A0 to the address inputs of both 2-to-4 decoders.
Connect A2 to the enable of the upper decoder, and A2 through a NOT gate to the enable of the lower decoder.
The lower decoder's outputs are Y0 to Y3 and the upper decoder's are Y4 to Y7.
Count the inputs from 000 to 111: exactly one output is 1 each time, moving from Y0 to Y7.

3-to-8 decoder from 2-to-4 decoders: truth table

A2	A1	A0	Enabled	Output that is 1
0	0	0	lower	Y0
0	0	1	lower	Y1
0	1	0	lower	Y2
0	1	1	lower	Y3
1	0	0	upper	Y4
1	0	1	upper	Y5
1	1	0	upper	Y6
1	1	1	upper	Y7

All eight input rows, with all eight outputs each, are checked on the live circuit before the page is built.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Selecting, routing and decoding

3-to-8 decoder 4-to-16 decoder from 2-to-4 decoders 2-to-4 decoder with enable programmable logic array (PLA)2-to-4 decoder 4-to-16 decoder 1-to-32 demultiplexer from 1-to-8 demuxes 4-to-2 encoder 1-to-16 demultiplexer 8-to-3 encoder 1-to-8 demultiplexer 4-to-2 priority encoder

All 246 build guides, by topic

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 3-to-8 decoder from two 2-to-4 decoders in the lab →

Frequently asked

How do you make a 3-to-8 decoder from 2-to-4 decoders?

Use two 2-to-4 decoders with enable inputs. Feed A1 and A0 to both, enable the lower one with NOT A2 and the upper one with A2. The lower decoder gives Y0 to Y3 and the upper gives Y4 to Y7.

How many 2-to-4 decoders are needed for a 3-to-8 decoder?

Two, plus one inverter for the top address bit. Without an inverter you can use a decoder with an active-low enable for one half.

How many 2-to-4 decoders make a 4-to-16 decoder?

Five: four 2-to-4 decoders for the outputs and a fifth 2-to-4 decoder, driven by A3 and A2, to enable one of them at a time.

What does the enable input of a decoder do?

When enable is off, every output is 0 whatever the address. When it is on, the decoder works normally. That is what lets several small decoders share address lines.