74HC139 (74LS139): the dual 2-to-4 decoder chip, live

The 74HC139 holds two independent 2-to-4 decoders. In each half, the select inputs B A pick one of four active-low outputs Y0 to Y3, which goes LOW while the other three stay HIGH, as long as the half's active-low strobe G is LOW; G HIGH forces all four outputs HIGH. This live circuit has both halves.

Each half is the 2-to-4 decoder with two changes that real chips almost always have: an enable, and active-low outputs, made here with a NAND of each decoded line and NOT G. Active-low outputs match the active-low chip-select pins of memories and peripherals, which is why TI describes the part as targeted at high-speed memory decoders and data-transmission systems: a 2-bit address picks one of four chips, and the strobe lets a higher address bit enable the whole group. The two halves share only power, so one package can decode two separate address fields, or, with the strobes driven by a third bit and its inverse, act as one 3-to-8 decoder (the job of the bigger 74LS138). B is the more significant select bit. The live chip opens with both strobes low, so 1Y0 and 2Y0 are LOW. All 64 combinations of both halves' inputs are checked before the page is built.

Big circuit: pinch, scroll or tap + to zoom in, then drag to move around.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

6× NOT: NOT G, NOT B and NOT A for each half
8× AND: the four B A combinations of each half
8× NAND: each output: NAND(decoded line, NOT G), LOW only when selected and enabled

Step by step

Place, for each half n, inputs nG, nB, nA and probes nY0 to nY3.
Decode B A into four lines with NOT gates and ANDs: B'A', B'A, BA', BA.
NAND each line with NOT G for the active-low outputs.
Keep G = 0 and count B A from 00 to 11: the single LOW output steps from Y0 to Y3. Set G = 1 and all four go HIGH.

74HC139 function table (each half)

G	B	A	Y0	Y1	Y2	Y3
1	X	X	1	1	1	1
0	0	0	0	1	1	1
0	0	1	1	0	1	1
0	1	0	1	1	0	1
0	1	1	1	1	1	0

74HC139 pinout

Pin	Name	Pin	Name
1	1G (strobe, active low)	16	VCC
2	1A	15	2G (strobe, active low)
3	1B	14	2A
4	1Y0	13	2B
5	1Y1	12	2Y0
6	1Y2	11	2Y1
7	1Y3	10	2Y2
8	GND	9	2Y3

X means the input does not matter. The function table and the 16-pin pinout are from TI's SN74HC139 datasheet (SCLS108E), checked 2026-10-25; it runs from 2 V to 6 V, and the 74LS139 shares the pinout.

You can also read the full theory in the lesson on decoders. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 74HC139 dual 2-to-4 decoder in the lab →

Frequently asked

What does the 74HC139 do?

It contains two independent 2-to-4 line decoders. In each, a 2-bit select (B A) drives one of four active-low outputs LOW while the strobe G is LOW; with G HIGH all four outputs are HIGH.

What is the difference between the 74HC139 and the 74HC138?

The 139 is two separate 2-to-4 decoders with one enable each; the 138 is one 3-to-8 decoder with three enables. Both have active-low outputs.

How do you make a 3-to-8 decoder from a 74HC139?

Wire the two halves' B and A inputs together and drive 1G with the third address bit and 2G with its inverse. The first half then decodes addresses 0 to 3 and the second 4 to 7.

Why does the 74HC139 have active-low outputs?

Because the chips it selects, such as memories, usually have active-low chip-select inputs, so a LOW output means selected and can be wired straight to them.