Flip-flop conversion: a D flip-flop from a JK, live

To convert one flip-flop type into another, you drive the inputs of the flip-flop you have with logic computed from the inputs you want, and sometimes from Q. The simplest case runs live here: a D flip-flop from a JK flip-flop needs only J = D and K = NOT D.

The method is always the same. Write the characteristic table of the flip-flop you want (what Q should become for each input), use the excitation table of the flip-flop you have (which inputs produce each change of Q) to find what its inputs must be, and simplify with a K-map. For JK to D: when D = 1, Q must become 1, which J = 1, K = 0 does; when D = 0, Q must become 0, which J = 0, K = 1 does. So J = D and K = NOT D, with no dependence on Q. The JK flip-flop here is the master-slave JK from NAND gates, saved as a part, so Q changes on the falling clock edge. The table below lists the other common conversions; two of them are live builds too, the T flip-flop from a D flip-flop and the JK flip-flop from a D flip-flop.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

1× JK flip-flop: the 8-NAND master-slave circuit, with its clear
1× NOT: K = NOT D

Step by step

Write the D flip-flop's characteristic table: Q next = D.
From the JK excitation table, Q going to 1 needs J = 1 (K = 0 or don't-care) and Q going to 0 needs K = 1 (J = 0 or don't-care).
Choose J = D and K = NOT D, which satisfies both rows whatever Q is.
Wire D to J and, through a NOT gate, to K. Turn CLR off and change D: Q copies it on the next falling clock edge.

Common flip-flop conversions

Want	Have	Connect
D	JK	J = D, K = NOT D
T	JK	J = K = T
SR	JK	J = S, K = R (S = R = 1 not allowed)
JK	D	D = J Q' + K' Q
T	D	D = T XOR Q
SR	D	D = S + R' Q
D	T	T = D XOR Q
JK	T	T = J Q' + K Q
JK	SR	S = J Q', R = K Q
D	SR	S = D, R = NOT D
T	SR	S = T Q', R = T Q

Each row comes from the same method: the wanted flip-flop's characteristic table and the existing flip-flop's excitation table. The live circuit, the first row, is checked over 10 clocks before the page is built.

You can also read the full theory in the lesson on flip-flop types and excitation tables. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the flip-flop conversion (JK to D) in the lab →

Frequently asked

How do you convert a JK flip-flop to a D flip-flop?

Connect J = D and K = NOT D. Then D = 1 sets the flip-flop and D = 0 resets it on the clock edge, which is exactly what a D flip-flop does.

How do you convert a D flip-flop to a T flip-flop?

Feed D = T XOR Q. With T = 0, D = Q and the flip-flop holds; with T = 1, D = NOT Q and it toggles.

How do you convert an SR flip-flop to a JK flip-flop?

Use S = J AND NOT Q and R = K AND Q. Gating with Q means S and R are never both 1, and J = K = 1 makes the flip-flop toggle instead of hitting the forbidden state.

What is an excitation table?

A table that lists, for each change of Q you want (0 to 0, 0 to 1, 1 to 0, 1 to 1), the flip-flop inputs that cause it. It is the characteristic table read backwards, and it is what you design with.