CMOS transmission gate: a switch that passes 0 and 1, live

A CMOS transmission gate is an NMOS and a PMOS transistor in parallel, switched by complementary signals: with EN = 1 both conduct and the output Y follows the input A, whether 0 or 1; with EN = 0 both are off and Y floats, connected to nothing. Here an inverter makes NOT EN for the PMOS, four transistors in all.

One transistor alone is a poor switch: an NMOS passes a strong 0 but only a weak 1, because it stops conducting as its output nears the supply, and a PMOS passes a strong 1 but a weak 0. In parallel they pass both levels at full strength. Unlike a logic gate, a transmission gate does not drive its output from the supply rails; it only connects or disconnects two wires, so a signal passed through several in a row gets slower, and real designs add buffers. Transmission gates build multiplexers (see the transmission-gate multiplexer), XOR gates, latches and flip-flops with few transistors. Compare the tri-state buffer, which also has a floating output but drives Y itself.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

1× NMOS transistor: between A and Y, gated by EN
1× PMOS transistor: between A and Y, gated by NOT EN
2× transistor (CMOS inverter): NOT EN for the PMOS

Step by step

Place VDD, GND, inputs A and EN, and a probe Y.
Build a CMOS inverter on EN to make NOT EN.
Put an NMOS and a PMOS side by side between A and Y: the NMOS gate on EN, the PMOS gate on NOT EN.
With EN = 1, toggle A: Y follows it. With EN = 0, Y floats (Z), whatever A is.

Transmission gate truth table

EN	A	NMOS	PMOS	Y
0	0	off	off	Z (floating)
0	1	off	off	Z (floating)
1	0	on	on	0
1	1	on	on	1

Z means the output is not driven at all. All four rows, including the two floating ones, are checked on the live circuit, which is made of transistors only, before the page is built. It starts with A = 1 and EN = 0, so Y floats until you turn EN on.

You can also read the full theory in the lesson on the transmission gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the CMOS transmission gate in the lab →

Frequently asked

What is a transmission gate?

A switch made of an NMOS and a PMOS transistor in parallel, controlled by complementary signals. When it is on it connects its two terminals and passes 0 and 1 at full strength; when it is off its output floats.

Why does a transmission gate use both NMOS and PMOS?

An NMOS passes a strong 0 but a weak 1, and a PMOS passes a strong 1 but a weak 0. Together they pass both logic levels without loss.

What is the output of a transmission gate when it is off?

Nothing drives it: the output floats in the high-impedance state, usually written Z, and takes whatever value something else on that wire drives.

Where are transmission gates used?

In multiplexers, XOR and XNOR gates, latches and flip-flops, where they replace several logic gates with a few switches, and as analog switches that pass voltages between 0 and the supply.