Pass transistor logic: a 2-to-1 mux from transmission gates

Pass transistor logic computes by steering signals through switches instead of building every output from the supply rails. The classic example is a 2-to-1 multiplexer from two transmission gates: S = 0 connects A to Y and S = 1 connects B to Y, using six transistors where a mux of NAND gates needs fourteen.

For each value of S exactly one transmission gate is on and the other is off, so one input always reaches Y and the output never floats. Only the inverter that makes NOT S is tied to the supply. Pass transistor logic saves transistors and is used for multiplexers, XOR gates and the data paths of latches, but it has costs: the output is only as strong as the input it passes, and a chain of switches gets slow, so designs add a buffer after a few stages. A single NMOS per input is smaller still but passes a weak 1, which is why CMOS uses the NMOS and PMOS pair. Compare the gate-level 2-to-1 multiplexer and the single transmission gate.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

2× transmission gate (NMOS + PMOS): one passes A when S = 0, the other passes B when S = 1
2× transistor (CMOS inverter): NOT S

Step by step

Place VDD, GND, inputs A, B and S, and a probe Y.
Build a CMOS inverter on S to make NOT S.
Transmission gate from A to Y: NMOS gated by NOT S, PMOS gated by S.
Transmission gate from B to Y: NMOS gated by S, PMOS gated by NOT S.
With S = 0, Y follows A; with S = 1, Y follows B.

Transmission gate multiplexer truth table

S	A	B	Y
0	0	0	0
0	0	1	0
0	1	0	1
0	1	1	1
1	0	0	0
1	0	1	1
1	1	0	0
1	1	1	1

All eight rows are checked on the live circuit, which is made of transistors only, before the page is built. Y is always driven by one of the inputs, never floating.

You can also read the full theory in the lesson on the transmission gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 2-to-1 mux from transmission gates in the lab →

Frequently asked

What is pass transistor logic?

A logic style that uses transistors as switches to pass input signals to the output, instead of building each output from the supply rails as static CMOS gates do. It often needs fewer transistors.

What are the disadvantages of pass transistor logic?

The output is only as strong as the signal passed through, a single NMOS passes a weak 1, and a long chain of switches gets slow, so pass-transistor stages need buffers to restore the signal.

How many transistors does a transmission gate multiplexer need?

Six for a 2-to-1 mux: two per transmission gate and two for the inverter that makes NOT S. A 2-to-1 mux of NAND gates needs fourteen.

Why use transmission gates instead of single NMOS pass transistors?

A single NMOS cannot pass a full 1 because it turns off as its output nears the supply. Adding a PMOS in parallel, gated by the opposite signal, passes the 1 at full strength.