7400 (74LS00, 74HC00): the quad NAND gate chip, live

The 7400 is a 14-pin chip with four independent 2-input NAND gates: each output nY is 0 only when both of its inputs nA and nB are 1. The 74LS00 (5 V TTL) and the 74HC00 (CMOS, 2 V to 6 V) share the same pinout, with VCC on pin 14 and GND on pin 7. This live chip has all four gates; toggle the inputs.

The 7400 is a natural first chip to wire on a breadboard, because NAND is a universal gate, so 7400s alone can build any logic circuit. One chip gives you a NOT (tie both inputs of a gate together), an AND (a NAND followed by that NOT), or, with all four gates, an XOR gate from four NANDs. Two gates cross-coupled make the SR latch from NAND gates, the same active-low SR latch that TI's 74HC00 datasheet uses as its application example. Inside, every gate in this simulator is the real thing: the CMOS NAND of two PMOS transistors in parallel and two NMOS in series. The chip's pin order is the pattern most quad gate chips follow, so the 7408, 7432 and 7486 plug into the same holes; the 7402 does not. All 256 combinations of the eight inputs are checked before the page is built.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

4× NAND: four independent 2-input NAND gates, Y = NOT (A AND B), numbered 1 to 4 as on the datasheet

Step by step

Power the chip: VCC on pin 14 and GND on pin 7 (5 V for the 74LS00; 2 V to 6 V for the 74HC00).
Each gate has two inputs, nA and nB, and an output nY; find their pins in the pinout below.
Tie every unused input to VCC or GND: TI's 74HC datasheets say unused inputs must be terminated, because a floating CMOS input can drift and draw current.
Set 1A = 1 and 1B = 1: 1Y goes to 0. Any other combination gives 1, on every one of the four gates.

7400 pinout

Pin	Name	Pin	Name
1	1A	14	VCC
2	1B	13	4B
3	1Y	12	4A
4	2A	11	4Y
5	2B	10	3B
6	2Y	9	3A
7	GND	8	3Y

NAND truth table (each gate)

A	B	Y
0	0	1
0	1	1
1	0	1
1	1	0

Pin numbers are for the DIP and SOIC packages (TI SN74HC00 and SN74LS00 datasheets, checked 2026-10-25); a few ceramic flat packages are wired differently. Each gate is independent: the chip is simply four NAND gates sharing power pins. See also the NAND truth table.

You can also read the full theory in the lesson on the NAND gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 7400 quad NAND gate chip in the lab →

Frequently asked

What is a 7400 chip?

A 14-pin integrated circuit with four independent 2-input NAND gates. Pin 14 is VCC and pin 7 is GND; the gates use pins 1 to 6 and 8 to 13. It is made in several logic families, such as the 74LS00 (TTL) and 74HC00 (CMOS).

What is the difference between the 74LS00 and the 74HC00?

Same logic and same pinout, different technology. The 74LS00 is low-power Schottky TTL for a 5 V supply (4.75 V to 5.25 V on TI's datasheet); the 74HC00 is high-speed CMOS that runs from 2 V to 6 V and draws much less power.

Why is the NAND gate called universal?

Because NOT, AND and OR, and so every other logic function, can be built from NAND gates alone: NOT is a NAND with its inputs tied, AND is NAND then NOT, and OR is NAND of the two inverted inputs (De Morgan). That is why one part number could build whole computers.

How do you make an XOR gate with a 7400?

Use all four gates: N1 = NAND(A, B), N2 = NAND(A, N1), N3 = NAND(B, N1), and Y = NAND(N2, N3) is A XOR B. The XOR from NAND page builds it live.