The 74181 ALU: a 4-bit arithmetic logic unit, live
The 74181 is a 4-bit arithmetic logic unit chip: from two 4-bit words A and B it computes one of 16 logic functions or 16 arithmetic operations, chosen by four select inputs S3 to S0 and a mode input M (M = 1 for logic, M = 0 for arithmetic), with a carry in Cn, a carry out Cn+4 and an A=B output. This live circuit reproduces its function table with logic gates.
The trick inside the chip is that each bit forms two terms, both chosen by S: an OR term P = A + B S0 + B' S1 and an AND term G = A (B' S2 + B S3). In arithmetic mode the chip adds them, F = P plus G plus the carry; in logic mode it blocks the carries and outputs F = NOT (P XOR G). Every row of the table falls out of that. With S = 1001, P = A OR B and G = A AND B, and (A OR B) plus (A AND B) is A plus B, so it adds; with S = 0110, P = A OR NOT B and G = A AND NOT B, which sum to A plus NOT B, that is A minus B minus 1, so it subtracts (a carry in makes it A minus B). The same two S settings in logic mode give XNOR and XOR. TI's datasheet describes the chip as having "a complexity of 75 equivalent gates"; this version uses 61 gates (two-input gates and inverters) and a ripple carry where the chip has carry look-ahead, which changes the speed of real hardware but not the outputs. It leaves out the X and Y look-ahead outputs, which matter only when cascading with a 74182. The datasheet gives two readings of the same pins, and this page uses its Table 2, for active-high data, in which the carries are active low: Cn = 1 means no carry in, Cn = 0 adds 1, and Cn+4 = 0 means a carry out. Before the page is built, all 16 functions in both modes with both carry inputs are checked on 20 pairs of A and B (1,280 rows) against that table, and the full 16,384-row table was checked once. The live circuit opens in A plus B (S = 1001, M = 0, Cn = 1). For the ALU this site's course builds, see the 4-bit ALU and the 1-bit ALU slice.
Open this circuit in the lab →
What you need
- 8× AND + 8 OR: the OR term of each bit, P = A + B S0 + B' S1
- 12× AND + 4 OR: the AND term of each bit, G = A (B' S2 + B S3)
- 4× XOR: P XOR G, the half sum of each bit
- 4× AND + 4 OR: the carry chain, ci+1 = G + P ci
- 4× OR + 4 XOR: F = (P XOR G) XOR (M OR c): with M = 1 the second term is always 1, so logic mode gives NOT (P XOR G)
- 6× NOT: B' for each bit, plus the active-low carry in (Cn) and carry out (Cn+4)
- 3× AND: A=B, the AND of F3 to F0
Step by step
- Place the inputs
A3toA0,B3toB0,S3toS0,MandCn, and probesF3toF0,Cn+4andA=B. - For each bit, build the OR term
P = A + B S0 + B' S1and the AND termG = A (B' S2 + B S3). - Add them: the half sum is
P XOR G, and the carry into the next bit isG + P c, starting fromc0 = NOT Cn. - Form each output as
F = (P XOR G) XOR (M OR c): in arithmetic mode the carries add in, and with M = 1 the result is NOT (P XOR G). - Finish with
Cn+4 = NOT c4andA=B = F3 F2 F1 F0. Try A plus B (S = 1001, M = 0, Cn = 1): 0101 and 0011 give F = 1000. Then set S = 0110 and Cn = 0 for A minus B.
74181 function table (active-high data)
| S3 S2 S1 S0 | Logic, M = 1 | Arithmetic, Cn = 1 (no carry) | Arithmetic, Cn = 0 (with carry) |
|---|---|---|---|
| 0 0 0 0 | NOT A | A | A plus 1 |
| 0 0 0 1 | NOT (A OR B) | A OR B | (A OR B) plus 1 |
| 0 0 1 0 | (NOT A) AND B | A OR (NOT B) | (A OR NOT B) plus 1 |
| 0 0 1 1 | 0 | minus 1 (1111) | 0 |
| 0 1 0 0 | NOT (A AND B) | A plus (A AND NOT B) | A plus (A AND NOT B) plus 1 |
| 0 1 0 1 | NOT B | (A OR B) plus (A AND NOT B) | (A OR B) plus (A AND NOT B) plus 1 |
| 0 1 1 0 | A XOR B | A minus B minus 1 | A minus B |
| 0 1 1 1 | A AND (NOT B) | (A AND NOT B) minus 1 | A AND (NOT B) |
| 1 0 0 0 | (NOT A) OR B | A plus (A AND B) | A plus (A AND B) plus 1 |
| 1 0 0 1 | NOT (A XOR B) | A plus B | A plus B plus 1 |
| 1 0 1 0 | B | (A OR NOT B) plus (A AND B) | (A OR NOT B) plus (A AND B) plus 1 |
| 1 0 1 1 | A AND B | (A AND B) minus 1 | A AND B |
| 1 1 0 0 | 1 | A plus A (shift left) | A plus A plus 1 |
| 1 1 0 1 | A OR (NOT B) | (A OR B) plus A | (A OR B) plus A plus 1 |
| 1 1 1 0 | A OR B | (A OR NOT B) plus A | (A OR NOT B) plus A plus 1 |
| 1 1 1 1 | A | A minus 1 | A |
74181 pinout
| Pin | Name | Pin | Name |
|---|---|---|---|
| 1 | B0 | 13 | F3 |
| 2 | A0 | 14 | A=B (open collector) |
| 3 | S3 | 15 | X (P, look-ahead) |
| 4 | S2 | 16 | Cn+4 |
| 5 | S1 | 17 | Y (G, look-ahead) |
| 6 | S0 | 18 | B3 |
| 7 | Cn | 19 | A3 |
| 8 | M | 20 | B2 |
| 9 | F0 | 21 | A2 |
| 10 | F1 | 22 | B1 |
| 11 | F2 | 23 | A1 |
| 12 | GND | 24 | VCC |
"plus" and "minus" are 4-bit arithmetic (results wrap around at 16, with the carry on Cn+4), while AND, OR, NOT and XOR act bit by bit. The table and the 24-pin DIP pinout are from TI's SN54LS181/SN74LS181 datasheet (SDLS136), Table 2 and the active-high pin designations, checked 2026-10-25. In Table 1, for active-low data, the same pins are read inverted, which is why the chip's diagrams label the data pins A-bar, B-bar and F-bar.
You can also read the full theory in the lesson on the ALU. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 74181 ALU in the lab →Frequently asked
What does the 74181 do?
It is a 4-bit ALU on one chip. Given two 4-bit numbers A and B, it computes one of 16 logic functions (with M = 1) or one of 16 arithmetic operations, including addition, subtraction, decrement and straight transfer (with M = 0), chosen by the select inputs S3 to S0, and it has a carry in, a carry out and an A=B output.
What is the M input on the 74181?
The mode control. With M high the internal carries are disabled and the chip performs the 16 bitwise logic functions; with M low the carries are enabled and it performs arithmetic.
How does the 74181 subtract?
With S = 0110 in arithmetic mode it adds A to the one's complement of B, which gives A minus B minus 1. Supplying a carry in (Cn = 0 with active-high data) adds the missing 1, so the result is A minus B.
Why are the 74181's carries active low?
The datasheet gives two equivalent readings of the pins. Read with active-low data (Table 1) the carries are active high; read with active-high data (Table 2), as on this page, the carry in and carry out pins are active low: Cn = 0 means a carry in and Cn+4 = 0 means a carry out.
What is the A=B output on the 74181?
It is high when all four F outputs are high. In subtract mode with no carry in, F = A minus B minus 1, which is 1111 exactly when A equals B, so the output works as an equality comparator. On the real chip it is open collector, so several chips' outputs can be wired together for wider words.
How do you build an 8-bit ALU from 74181s?
Use two chips side by side, with the low nibble in one and the high nibble in the other, and connect the carry out Cn+4 of the low chip to the carry in Cn of the high chip. For more chips and higher speed, the 74182 look-ahead carry generator uses each chip's X and Y outputs instead of rippling the carry.