CD4017 decade counter: how the Johnson counter works, live

The CD4017 is a decade counter with ten decoded outputs: each rising edge on CLOCK moves a single high output one step along, from O0 to O9 and back to O0, so exactly one of the ten outputs is high at a time. Inside it is a 5-stage Johnson counter and ten 2-input AND gates. This live circuit is built the same way.

TI's datasheet (from Harris Semiconductor) explains the design choice: "Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs." A Johnson counter of five flip-flops steps through ten states in which exactly one bit changes per clock, so each count is identified by just two neighbouring bits, for example O1 = Q0 AND NOT Q1, and no decoder output can glitch. CARRY OUT is high for counts 0 to 4 and low for 5 to 9, one cycle every ten clocks, which is how one CD4017 clocks the next in a multi-digit chain. RESET high returns the count to 0, and CLOCK INHIBIT high stops the clock (the datasheet adds that with CLOCK held high, the inhibit input can serve as a falling-edge clock). The real chip also has anti-lock gating that steers it back to a valid state; this version omits it and starts from RESET instead. Here CLOCK is a plain switch, so you count by hand. It opens with RESET high: set RESET to 0, then turn CLOCK on and off to step O0 to O9. Before the page is built, a 33-step sequence (reset, a full lap of ten clocks, two blocked clocks under CLOCK INHIBIT, two more clocks, reset) is checked on all eleven outputs.

Big circuit: pinch, scroll or tap + to zoom in, then drag to move around.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

5× D flip-flop with clear: the Johnson counter: D0 = NOT Q4, and each later stage takes the one before
10× AND: the decoded outputs, each from two neighbouring stages
1× AND + 1 NOT: the clock, CLOCK AND NOT CLOCK INHIBIT
1× NOT: CARRY OUT = NOT Q4

Step by step

Place inputs CLOCK, INHIBIT (CLOCK INHIBIT) and RESET, and probes O0 to O9 and CARRY.
Build a 5-stage Johnson counter: five D flip-flops with clear, D0 = NOT Q4 and each later stage fed from the one before, all cleared by RESET and clocked by CLOCK AND NOT INHIBIT.
Decode each count with one 2-input AND: O0 = Q0' Q4', O1 = Q0 Q1', O2 = Q1 Q2', ..., O5 = Q4 Q0, O6 = Q0' Q1, ..., O9 = Q3' Q4.
Add CARRY = NOT Q4, high for counts 0 to 4.
Set RESET to 0 and pulse CLOCK: the high output walks from O0 to O9, then wraps to O0.

The ten counts

Count	Q0 Q1 Q2 Q3 Q4	High output	Decoded by	CARRY
0	0 0 0 0 0	O0	Q0' Q4'	1
1	1 0 0 0 0	O1	Q0 Q1'	1
2	1 1 0 0 0	O2	Q1 Q2'	1
3	1 1 1 0 0	O3	Q2 Q3'	1
4	1 1 1 1 0	O4	Q3 Q4'	1
5	1 1 1 1 1	O5	Q4 Q0	0
6	0 1 1 1 1	O6	Q0' Q1	0
7	0 0 1 1 1	O7	Q1' Q2	0
8	0 0 0 1 1	O8	Q2' Q3	0
9	0 0 0 0 1	O9	Q3' Q4	0

CD4017 pinout

Pin	Name	Pin	Name
1	O5	16	VDD
2	O1	15	RESET
3	O0	14	CLOCK
4	O2	13	CLOCK INHIBIT
5	O6	12	CARRY OUT
6	O7	11	O9
7	O3	10	O4
8	VSS	9	O8

The outputs are scattered around the package, so check the pinout before wiring LEDs in order. Pinout and behaviour are from TI's CD4017B datasheet (SCHS027C), checked 2026-10-25; it runs from 3 V to 18 V. Each decoded output stays high for one full clock cycle. The datasheet lists decade counting with a decimal display, frequency division and divide-by-N counting among its uses.

You can also read the full theory in the lesson on the Johnson counter. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the CD4017 decade counter in the lab →

Frequently asked

How does the CD4017 work?

It is a 5-stage Johnson counter with ten decoded outputs. Each rising clock edge (with CLOCK INHIBIT low) advances the count, and the output for the current count is high while the other nine are low, so a single high output steps from O0 to O9 and wraps around.

What does the RESET pin on a CD4017 do?

A high level on RESET clears the counter to its zero count, so O0 goes high. A common trick is to wire an output, such as O5, back to RESET so the chip counts 0 to 4 and repeats, a divide-by-5 counter.

What is CARRY OUT on the CD4017?

An output that is high for counts 0 to 4 and low for 5 to 9, so it completes one cycle every ten clock pulses. Feeding it to the CLOCK input of a second CD4017 makes the second chip count the tens.

Why does the CD4017 use a Johnson counter?

In a Johnson counter only one flip-flop changes per clock, and each of its ten states can be recognized from just two neighbouring bits. That gives 2-input decoding and decoded outputs without glitches, as the datasheet says, and it allows high-speed operation.

What is the CD4017 pinout?

Pin 1 O5, 2 O1, 3 O0, 4 O2, 5 O6, 6 O7, 7 O3, 8 VSS, 9 O8, 10 O4, 11 O9, 12 CARRY OUT, 13 CLOCK INHIBIT, 14 CLOCK, 15 RESET, 16 VDD.