Johnson counter
The twisted ring
A Johnson counter (twisted ring counter) is a shift register whose inverted last output feeds back into its first input, so n flip-flops step through a fixed cycle of 2n states in which exactly one bit changes per clock, letting every state be decoded glitch-free with a two-input gate.
The shift register lesson ended on a teaser: feed the last stage's output back into the first stage's input and the stored pattern stops falling off the end and cycles forever. That loop is a ring counter, and this lesson builds its cleverer sibling. Invert the fed-back signal, one NOT gate in the loop, and the circuit becomes a Johnson counter (also called a twisted ring counter), which squeezes twice as many states out of the same flip-flops.
From ring to twisted ring
In a straight ring counter,
Q3 feeds D0 directly. Seed the loop with a single 1 and that one hot bit rotates: 1000, 0100, 0010, 0001, then back to 1000. Four flip-flops give four states, and the course's control unit uses exactly this to make its step signals T0 to T3. The Johnson counter changes one wire: D0 = NOT Q3. Now whatever comes around the loop arrives flipped. While Q3 is 0, 1s pour into stage 0; once the 1s reach the end and Q3 turns 1, 0s pour in instead. The register fills with 1s from the left, then drains, over and over.It is a stadium wave. A row of four fans stands up one at a time, left to right; when the last one is standing, the first sits, and the sitting sweeps across the same way. Standing and sitting each take four steps, so the full routine has eight distinct snapshots, from four fans, which is the whole trick:
n flip-flops, 2n states.| Edge | Q0 | Q1 | Q2 | Q3 |
|---|---|---|---|---|
| 1 | 1 | 0 | 0 | 0 |
| 2 | 1 | 1 | 0 | 0 |
| 3 | 1 | 1 | 1 | 0 |
| 4 | 1 | 1 | 1 | 1 |
| 5 | 0 | 1 | 1 | 1 |
| 6 | 0 | 0 | 1 | 1 |
| 7 | 0 | 0 | 0 | 1 |
| 8 | 0 | 0 | 0 | 0 |
0000 after a reset: each clock edge shifts the register right while D0 loads NOT Q3. Fill with 1s, drain with 0s, wrap after eight edges. Note that exactly one bit changes between any two consecutive rows.NOT Q3 fed back into D0. Each stage's D passes through an AND gated by NOT RST, so raising RST clears every stage on the next edge. The figure is drawn mid-fill, one reset cycle plus three counting edges in, reading Q0 Q1 Q2 Q3 = 1110. Open it in the lab, pulse RST, then run the clock and watch the wave fill and drain.Compare the three counters you now know, all built from four flip-flops. A straight ring counter cycles through 4 states (one hot bit, no decoding needed). A Johnson counter cycles through 8 (the fill-and-drain patterns). A binary counter reaches all 16 (it counts in binary, but needs an adder-style increment and multi-input decoding). The Johnson counter sits deliberately in the middle: twice the ring's states, still trivially cheap to decode.
Glitch-free decoding with two-input gates
A counter usually exists so other logic can ask "are we on step 5?". With a Johnson counter, every such question needs only two of the bits, because each state is uniquely identified by where the edge of its block of
1s sits. 1000 is the only state with Q0 = 1 and Q1 = 0; 1110 is the only one with Q2 = 1 and Q3 = 0; 1111 is the only one with both ends high (Q0 AND Q3), and 0000 the only one with both ends low. One 2-input AND gate (with the right inputs, some inverted) per state decodes all eight.Better still, the decoding is glitch-free. Look back at the sequence table: exactly one bit changes on every edge, the same unit-distance property as a Gray code. A binary counter stepping from
0111 to 1000 changes all four bits, and if they do not change at precisely the same instant its decode gates can spit out nanosecond-wide false pulses, the hazards problem in sequential clothing. A Johnson counter's states are always one bit apart, so no decode gate ever sees two inputs racing each other. That is why the classic CD4017 "decade counter" chip, the one behind countless LED chaser circuits, is internally a 5-stage Johnson counter (10 states) with its ten decode gates on board.Johnson counters also make clean frequency dividers. Each output is a square wave with a period of
2n clocks and a perfect 50 percent duty cycle (high for n clocks, low for n), and each stage's wave is the previous one delayed by a clock. A 4-stage counter divides the clock by 8; a 2-stage one produces two square waves a quarter period apart, the classic quadrature pair used to drive things like stepper motors.Both rings need supervision, for opposite reasons. A straight ring counter must be *seeded*: it only works if exactly one
1 is circulating, and its natural cleared state, all zeros, just rotates zeros forever (a silent lockout). The Johnson counter clears gracefully, since 0000 is a legal state in its cycle, and that reset friendliness is one reason designers like it. Its trap is subtler: a 4-bit register has 16 possible patterns and the Johnson cycle uses only 8. The other 8 (such as 1010) form their own parasitic loop (1010 -> 1101 -> 0110 -> 1011 -> 0101 -> 0010 -> 1001 -> 0100 and around again), so a power-up fluke or glitch that lands the register there leaves it cycling wrong forever. That is why the circuit above gates every D with NOT RST: a reset line (or self-correcting feedback logic) is not optional.Try it
A 4-bit Johnson counter currently holds
Q0 Q1 Q2 Q3 = 0111. What are the next two states, and after how many more edges does it show 0111 again?Answer
Build it in the lab ↗It is draining:
Q3 = 1, so D0 = NOT Q3 = 0. The next edge shifts to 0011, and the one after that to 0001. The cycle has 8 states, so 0111 comes back around after exactly 8 edges. (Then build it for real: the lab exercise scores you on the full fill-and-drain sequence.)You now have the whole shift-register family: the plain chain that moves data, the ring that sequences the control unit's steps, and the twisted ring that doubles the states and decodes clean. Next up is the question every one of these clocked chains eventually forces: how fast can the edges come? That is timing.
Frequently asked
What is a Johnson counter?
A Johnson counter (also called a twisted ring counter) is a shift register whose last output is inverted and fed back into its first input (
D0 = NOT Qlast). It cycles through 2n states with n flip-flops, filling with 1s from one end and then draining, with exactly one bit changing per clock edge.What is the difference between a ring counter and a Johnson counter?
A ring counter feeds
Qlast straight back to D0, so a single hot 1 rotates and n flip-flops give n states. A Johnson counter inverts that feedback (D0 = NOT Qlast), which doubles the cycle to 2n states. The ring counter is one-hot (no decoding needed); the Johnson counter needs one 2-input gate per state but gets twice the states from the same hardware.How many states does a Johnson counter have?
2n states from n flip-flops: a 4-bit Johnson counter cycles through 8 states, a 5-stage one through 10. Compare a ring counter's n and a binary counter's 2^n (16 for four flip-flops); the Johnson counter trades some count range for one-bit-per-step transitions and cheap decoding.What is the difference between a shift register and a ring counter?
A shift register is an open chain: bits enter at one end, march one stage per clock, and fall off the other end. A ring counter closes that chain into a loop, feeding the last output back to the first input, so the stored pattern circulates forever instead of leaving. A Johnson counter is the same loop with the fed-back bit inverted.
Why is a Johnson counter's decoding glitch-free?
Because exactly one bit changes on every clock edge, like a Gray code. Decode gates can only glitch when two or more of their inputs change nearly at once, as happens in a binary counter stepping from
0111 to 1000. In a Johnson counter no two bits ever race, and each of the 2n states is identified by just two bits, so every state decodes cleanly with a 2-input gate.Every lesson here builds toward one thing: a working CPU, from the transistor up.
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