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Half subtractor

Subtracting two bits

6 min read

A half subtractor subtracts one bit from another, producing a Difference (their XOR) and a Borrow out (NOT A AND B) that flags when the subtraction must borrow from the next column. It mirrors the half adder, with one inverter as the only extra hardware.

The half adder added two bits with one XOR and one AND. Subtraction has an exact mirror circuit. This lesson builds it, and the punchline is how *little* changes: the Difference output is the very same XOR, and the whole cost of switching from addition to subtraction is a single NOT gate.
The job: compute A - B for single bits, where A is the minuend (the bit being subtracted *from*) and B is the subtrahend (the bit being taken away). Three of the four cases are easy: 0 - 0 = 0, 1 - 0 = 1, 1 - 1 = 0. The fourth, 0 - 1, does not fit in one bit, exactly the way 1 + 1 did not fit for the half adder. On paper you handle it by borrowing: take a 2 from the next column to the left (the way you borrow a ten in decimal), compute 2 - 1 = 1, and remember that you now owe that column a 1. The circuit does the same: it outputs the column result D = 1 and raises a Borrow out Bout = 1 to report the debt.
ABDBout
0000
0111
1010
1100
Half subtractor truth table. D is the difference bit of A - B; Bout is 1 only in the one row that cannot be done without borrowing, 0 - 1.
Read the borrow row like decimal column subtraction. Computing 3 - 7 in one decimal column, you borrow a ten: 13 - 7 = 6, and you owe the next column 1. In binary, 0 - 1 borrows a two: 10 - 1 = 1 (that is 2 - 1 in decimal), so D = 1, and Bout = 1 records the debt. The borrow is not an error; it is how subtraction reaches into the next column.

Recognizing the gates

Compare the output columns with truth tables you know. D is 1 exactly when the inputs differ, which is XOR, the same function as the half adder's Sum. Bout is 1 in exactly one row: A = 0 and B = 1. "A is 0" is NOT A, and "both conditions at once" is AND, so Bout = (NOT A) AND B. Three gates total: XOR, NOT, AND.
D = A B
Bout = A'·B
  1. Place an XOR, a NOT, and an AND from your library.
  2. Wire input A to the XOR's top pin and to the NOT's input.
  3. Wire input B to the XOR's bottom pin and to the AND's bottom pin.
  4. Wire the NOT's output into the AND's top pin.
  5. Label the XOR output D (Difference) and the AND output Bout (Borrow out).
The complete half subtractor: the XOR computes the Difference, and the NOT plus AND raise Bout only for 0 - 1. Toggle A and B through all four rows, or follow the gate-by-gate version in how to build a half subtractor.
The two outputs together encode the true signed answer: A - B = D - 2 x Bout. Check the borrow row: D = 1 and Bout = 1 give 1 - 2 = -1, which is exactly 0 - 1. The circuit never loses information; it just splits the answer into a column bit and a debt bit.
Operand order matters. The circuit computes A - B, never B - A. The XOR does not care (it is symmetric), but the borrow does: Bout watches specifically for A = 0, B = 1. Swap the operands into the wrong pins and every borrow fires on the wrong rows. Contrast that with the half adder, where swapping A and B changes nothing because addition is symmetric. Subtraction is not, and the inverter sits on the minuend side to prove it.
Here is the half adder comparison people ask for. Both circuits share the identical first output: Sum and Difference are each A XOR B. Only the second output differs: the half adder's Carry is A AND B (symmetric, because A + B = B + A), while the half subtractor's Borrow is (NOT A) AND B (asymmetric, because A - B and B - A are different numbers). One inverter is the entire hardware price of that asymmetry.
Try it
Rewire the circuit to compute B - A instead. Which output column of the truth table changes, which stays the same, and where does the NOT gate end up?
Like the half adder, the half subtractor only handles the rightmost column of a subtraction, because it has no way to accept a borrow coming *in* from the column below. Every other column must subtract three things: A, B, and the incoming debt. Teaching it that third input is the full subtractor, and a chain of those subtracts whole binary numbers.

Frequently asked

What is a half subtractor?

A half subtractor subtracts one bit from another (A - B) and produces two outputs: a Difference (D = A XOR B) and a Borrow out (Bout = NOT A AND B) that is 1 when the subtraction must borrow from the next column. It is the simplest subtraction circuit.

What is the half subtractor truth table?

Four rows: A = 0, B = 0 gives Difference 0, Borrow 0; A = 0, B = 1 gives Difference 1, Borrow 1 (the only borrow case); A = 1, B = 0 gives Difference 1, Borrow 0; and A = 1, B = 1 gives Difference 0, Borrow 0. In equation form, D = A XOR B and Bout = (NOT A) AND B.

What is the difference between a half adder and a half subtractor?

Their first outputs are identical: the half adder's Sum and the half subtractor's Difference are both A XOR B. Only the second output differs: the adder's Carry is A AND B, while the subtractor's Borrow is (NOT A) AND B. The extra NOT exists because addition is symmetric but subtraction is not: A - B and B - A are different numbers, so the circuit must know which input is being subtracted from.

Which gates make a half subtractor?

Three gates: one XOR for the Difference, plus one NOT and one AND for the Borrow (Bout = NOT A AND B). That is exactly the half adder's gate list plus a single inverter.

What is the difference between a half subtractor and a full subtractor?

A half subtractor subtracts two bits and has no borrow input, so it only works for the rightmost column. A full subtractor subtracts three bits (A - B - Bin, where Bin is the borrow coming in from the column below), which is what lets you chain one per column to subtract multi-bit numbers.

Every lesson here builds toward one thing: a working CPU, from the transistor up.

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Builds towardFull subtractor
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Written by Taceddin SancakCreator of digiwleea. These lessons and the switch-level simulator every diagram runs on grew out of one goal: understand computers from the transistor up by building one.