Skip to content
digiwleeaTools
LearnGlossaryAboutCheat sheetHow a CPU worksToolsOpen the lab →

74HC244 (74LS244): the octal tri-state buffer chip, live

The 74HC244 is an octal buffer with tri-state outputs, organized as two groups of four. While a group's output enable (1OE or 2OE, active low) is LOW, each output nYk copies its input nAk; while it is HIGH, the group's four outputs float (high impedance), as if disconnected. That is how many chips can share one bus. This live circuit has both groups.

TI's datasheet says the 74HC244 is designed for 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters, and describes it as "two 4-bit buffers and drivers with separate output-enable (OE) inputs" that pass noninverted data when OE is low and go to high impedance when it is high. Each of the eight buffers here is the transistor-level tri-state buffer (eight transistors), so you can watch an output float: the simulator shows a floating output as Z. A floating output is the point of the chip: on a shared bus exactly one driver is enabled at a time and every other one lets go, so their outputs never fight. The two groups have separate enables, so one chip can buffer a 4-bit address one way and a 4-bit status the other, or both halves can be tied together into an 8-bit buffer. The live chip opens with both enables LOW and all inputs 0. Before the page is built, 64 steps (every 4-bit pattern on group 1, its complement on group 2, with each group enabled and disabled) are checked on all eight outputs, the floating ones included.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

Step by step

  1. Place inputs 1OE, 2OE, 1A1 to 1A4, 2A1 to 2A4, and probes 1Y1 to 2Y4.
  2. Put a tri-state buffer between each A input and its Y output.
  3. Enable group 1's four buffers from NOT 1OE and group 2's from NOT 2OE.
  4. With 1OE = 0, toggle 1A1: 1Y1 follows. Set 1OE = 1: all four group 1 outputs float (Z), while group 2 keeps working.

74HC244 function table (each buffer)

OEAY
000
011
1XZ (high impedance)

74HC244 pinout

PinNamePinName
11OE (active low)20VCC
21A1192OE (active low)
32Y4181Y1
41A2172A4
52Y3161Y2
61A3152A3
72Y2141Y3
81A4132A2
92Y1121Y4
10GND112A1

X means the input does not matter; Z is the floating, high-impedance state. The behavior and the 20-pin pinout are from TI's SN74HC244 datasheet, checked 2026-10-25; it runs from 2 V to 6 V. The two groups' pins interleave: group 1's inputs are on the left side and outputs on the right, group 2 the other way round.

You can also read the full theory in the lesson on tri-state buffers. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adderfull adderhalf subtractorfull subtractor2:1 multiplexer4:1 multiplexerXOR gate from NAND gates2-to-4 decoderSR latchD flip-flopJK flip-flopT flip-flop4-bit shift register4-bit ripple carry adderD latch1-to-4 demultiplexer4-bit magnitude comparator4-bit ring counter4-bit Johnson counter4-to-2 priority encoder4-bit synchronous counter3-to-8 decoder8-to-1 multiplexer4-bit carry lookahead adderhalf adder from NAND gates2-bit comparatorBCD to 7-segment decoder4-bit up/down counterdecade counter2-bit multiplier4-bit ALU4-bit array multiplierNOT, AND, OR and NOR from NANDNOT, OR, AND and XOR from NORfull adder from NAND gatesSR latch from NAND gatesparity generator and checker4-bit adder/subtractorBCD adder4-bit universal shift registermod-6 counter4-bit ripple counterbinary to Gray code converterhalf adder from NOR gatesfull adder from NOR gates4-bit register with parallel load1011 sequence detectorbinary to BCD converterD flip-flop from NAND gates1-bit ALUCMOS inverterCMOS NAND gateCMOS NOR gatePISO shift registerSR flip-flop from NAND gatesBCD to excess-3 code converterHamming (7,4) code encoder and correctortraffic light controller4-bit barrel shifterCMOS AND gateCMOS OR gateCMOS XOR gate1-bit magnitude comparatorhalf subtractor from NAND gatesfull subtractor from NAND gates8-to-3 encoderGray to binary converter4-to-16 decoderfull adder using 4:1 multiplexersedge detectorserial adder4-bit carry-select adder4-bit Kogge-Stone adder4-bit carry-skip adder4x4 Wallace tree multiplier8-bit adderfrequency divider (by 2, 4 and 3)switch debouncer (SR latch)3-bit Gray code counterMealy machine (1011 detector)master-slave JK flip-flop (NAND)half subtractor from NOR gates1-to-8 demultiplexerexcess-3 to BCD code convertervending machine FSM4-bit carry-save adder3-bit synchronous counter (JK)CMOS transmission gatetri-state buffer (CMOS)2-to-1 mux from transmission gatesmod-5 counterflip-flop conversion (JK to D)8-bit ALUdecimal to BCD encoderBCD to decimal decoder4-to-1 mux from 2-to-1 muxesXOR gate from NOR gates4-bit LFSR74LS138 decoderBCD subtractor74181 ALUCMOS AOI gate (AOI21)D latch vs D flip-flop74LS47 BCD to 7-segment decoder74HC595 shift register7400 quad NAND gate chip7402 quad NOR gate chip7404 hex inverter chip7408 quad AND gate chip7432 quad OR gate chip7486 quad XOR gate chip7474 dual D flip-flop74HC165 shift registerCD4017 decade counter74LS283 4-bit adder74LS90 decade counter74HC161 4-bit counter74HC151 8-to-1 multiplexer74HC157 quad 2-to-1 multiplexer74HC139 dual 2-to-4 decoderCD4511 BCD to 7-segment decoder7492 divide-by-12 counter7493 4-bit binary counterRace-around condition (JK latch)74HC373 octal latch74HC374 octal D flip-flopTurnstile state machine1-to-2 demultiplexerhalf adder using 2:1 multiplexers

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 74HC244 octal buffer in the lab →

Frequently asked

What does the 74HC244 do?

It is an octal (8-bit) buffer and line driver with tri-state outputs, in two groups of four. With a group's active-low output enable LOW, its outputs copy its inputs; with it HIGH, those outputs go to high impedance.

What is a tri-state output?

An output with a third state besides 0 and 1: high impedance, where it neither drives high nor low and behaves as if disconnected. It lets several outputs share one wire, as long as only one is enabled at a time.

What is the difference between the 74HC244 and the 74HC245?

The 244 is a one-way buffer: data goes from the A side to the Y side. The 245 is a bidirectional transceiver with a direction input, used where data must flow both ways on a bus.

Does the 74HC244 invert the data?

No. The datasheet describes it as passing noninverted data from the A inputs to the Y outputs while the output enable is low.