Finite state machine examples: a turnstile, live, and more

The simplest useful finite state machine is a coin-operated turnstile: it is either LOCKED or UNLOCKED. A coin unlocks a locked turnstile, a push through locks an unlocked one, and anything else leaves it as it is. This live circuit is that machine, one D flip-flop for the state and three gates for the next-state logic, and below it is a table of the larger state machines built live on this site.

Every finite state machine has the same three parts: a register that holds the current state, logic that computes the next state from the state and the inputs, and outputs. Here the state is one flip-flop, Q = 0 for LOCKED and Q = 1 for UNLOCKED, and the next state follows straight from the rules: from LOCKED, go to UNLOCKED if COIN is 1; from UNLOCKED, stay unless PUSH is 1. As one equation, D = COIN Q' + PUSH' Q. The output UNLOCKED depends only on the state, which makes this a Moore machine (compare the Mealy machine). Notice what the design says about odd inputs: a push while locked does nothing, an extra coin while unlocked is simply kept, and a coin and a push in the same clock while locked unlock it. Writing the state table first is what forces those decisions. Here CLK is a plain switch, so each clock is a click. The circuit opens with CLR = 1 (locked): set CLR to 0, put a 1 on COIN, and pulse CLK. Before the page is built, a 23-step sequence covering every transition is checked.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

1× D flip-flop with clear: the state Q (0 = LOCKED, 1 = UNLOCKED), cleared to LOCKED by CLR
2× AND + 1 OR: the next state D = (COIN AND Q') OR (NOT PUSH AND Q)
1× NOT: NOT PUSH

Step by step

Place inputs COIN, PUSH, CLK, CLR and a probe UNLOCKED.
Write the state table: LOCKED + coin goes to UNLOCKED, UNLOCKED + push goes to LOCKED, every other case stays put.
Encode LOCKED = 0 and UNLOCKED = 1 and read the next state off the table: D = COIN Q' + PUSH' Q.
Wire D into a D flip-flop with clear, and probe its Q as the output.
Clear it, then clock in a coin (UNLOCKED goes on) and then a push (it goes off).

Turnstile state table

State	COIN	PUSH	Next state	UNLOCKED (output)
LOCKED (0)	0	X	LOCKED	0
LOCKED (0)	1	X	UNLOCKED	0
UNLOCKED (1)	X	0	UNLOCKED	1
UNLOCKED (1)	X	1	LOCKED	1

More finite state machine examples, live

Machine	States	What it shows
Traffic light controller	Green, yellow, red phases	A Moore machine whose outputs drive lights
Vending machine	Money inserted so far	Inputs that add up, and an output when enough has arrived
Sequence detector (Moore)	How much of 1011 has arrived	Spotting a bit pattern, overlaps included
Sequence detector (Mealy)	Four states for 1011	Outputs that depend on the input too
Edge detector	This bit and the last one	A one-clock pulse on every change
Gray code counter	Eight codes	Next-state logic from K-maps
Mod-5 counter	0 to 4	Unused states and self-starting
Serial adder	The carry	One bit of arithmetic per clock

X means the input does not matter. Every machine above is designed the same way: list the states, write the table of next states and outputs, choose a binary code for each state, and turn each next-state bit into logic. The finite state machine lesson walks through the method.

You can also read the full theory in the lesson on finite state machines. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adder full adder half subtractor full subtractor 2:1 multiplexer 4:1 multiplexer XOR gate from NAND gates 2-to-4 decoder SR latch D flip-flop JK flip-flop T flip-flop 4-bit shift register 4-bit ripple carry adder D latch 1-to-4 demultiplexer 4-bit magnitude comparator 4-bit ring counter 4-bit Johnson counter 4-to-2 priority encoder 4-bit synchronous counter 3-to-8 decoder 8-to-1 multiplexer 4-bit carry lookahead adder half adder from NAND gates 2-bit comparator BCD to 7-segment decoder 4-bit up/down counter decade counter 2-bit multiplier 4-bit ALU 4-bit array multiplier NOT, AND, OR and NOR from NAND NOT, OR, AND and XOR from NOR full adder from NAND gates SR latch from NAND gates parity generator and checker 4-bit adder/subtractor BCD adder 4-bit universal shift register mod-6 counter 4-bit ripple counter binary to Gray code converter half adder from NOR gates full adder from NOR gates 4-bit register with parallel load 1011 sequence detector binary to BCD converter D flip-flop from NAND gates 1-bit ALU CMOS inverter CMOS NAND gate CMOS NOR gate PISO shift register SR flip-flop from NAND gates BCD to excess-3 code converter Hamming (7,4) code encoder and corrector traffic light controller 4-bit barrel shifter CMOS AND gate CMOS OR gate CMOS XOR gate 1-bit magnitude comparator half subtractor from NAND gates full subtractor from NAND gates 8-to-3 encoder Gray to binary converter 4-to-16 decoder full adder using 4:1 multiplexers edge detector serial adder 4-bit carry-select adder 4-bit Kogge-Stone adder 4-bit carry-skip adder 4x4 Wallace tree multiplier 8-bit adder frequency divider (by 2, 4 and 3)switch debouncer (SR latch)3-bit Gray code counter Mealy machine (1011 detector)master-slave JK flip-flop (NAND)half subtractor from NOR gates 1-to-8 demultiplexer excess-3 to BCD code converter vending machine FSM 4-bit carry-save adder 3-bit synchronous counter (JK)CMOS transmission gate tri-state buffer (CMOS)2-to-1 mux from transmission gates mod-5 counter flip-flop conversion (JK to D)8-bit ALU decimal to BCD encoder BCD to decimal decoder 4-to-1 mux from 2-to-1 muxes XOR gate from NOR gates 4-bit LFSR 74LS138 decoder BCD subtractor 74181 ALU CMOS AOI gate (AOI21)D latch vs D flip-flop 74LS47 BCD to 7-segment decoder 74HC595 shift register 7400 quad NAND gate chip 7402 quad NOR gate chip 7404 hex inverter chip 7408 quad AND gate chip 7432 quad OR gate chip 7486 quad XOR gate chip 7474 dual D flip-flop 74HC165 shift register CD4017 decade counter 74LS283 4-bit adder 74LS90 decade counter 74HC161 4-bit counter 74HC151 8-to-1 multiplexer 74HC157 quad 2-to-1 multiplexer 74HC139 dual 2-to-4 decoder CD4511 BCD to 7-segment decoder 7492 divide-by-12 counter 7493 4-bit binary counter 74HC244 octal buffer Race-around condition (JK latch)74HC373 octal latch 74HC374 octal D flip-flop 1-to-2 demultiplexer half adder using 2:1 multiplexers register file (4 x 4-bit)digital PWM generator CD4013 dual D flip-flop 74LS76 dual JK flip-flop

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the Turnstile state machine in the lab →

Frequently asked

What is a simple example of a finite state machine?

A coin-operated turnstile: two states, LOCKED and UNLOCKED, two inputs, COIN and PUSH. A coin unlocks it, a push locks it again, and every other input leaves the state alone. It fits in one flip-flop and three gates.

What are some real-world examples of finite state machines?

Traffic lights, vending machines, elevators, washing machines, turnstiles, and inside computers, the control unit of a CPU, serial communication receivers and pattern detectors. Several are built live on this page's list.

What is the difference between a Moore and a Mealy machine?

A Moore machine's outputs depend only on the current state, like the turnstile's UNLOCKED output. A Mealy machine's outputs depend on the state and the current inputs, which often saves states but lets an output change as soon as an input does.

How do you design a finite state machine?

List the states, draw the transitions for every input, write the state table, assign each state a binary code, then derive each flip-flop's next-state equation and each output from the table, for example with K-maps.