Mod-12 counter: count 0 to 11 and wrap, live
A mod-12 counter counts 0 to 11 and then returns to 0: twelve states, as on a 12-hour clock. This one is a 4-bit synchronous counter whose next state is forced to 0000 when the count reaches 11 (1011), detected as Q3 AND Q1 AND Q0.
Four flip-flops can count to 15, so a mod-12 counter needs four and stops early. The counting logic is the usual synchronous one: each bit toggles when all the bits below it are 1 (D0 = NOT Q0, D1 = Q1 XOR Q0, D2 = Q2 XOR Q1 Q0, D3 = Q3 XOR Q2 Q1 Q0). To wrap after 11, the circuit spots 1011 and clears all four D inputs at the next clock. Because the counter never reaches 12 to 15, the only reachable state with Q3, Q1 and Q0 all 1 is 11, so three bits are enough to detect it. Resetting synchronously, at the clock edge, avoids the brief glitch an asynchronous clear would put on the outputs. A 12-hour clock pairs it with a decade counter and a mod-6 counter for the minutes; the binary clock chains counters the same way for 24-hour time. The live circuit opens with CLR on because flip-flops start in an unknown state; turn it off and the count runs.
Open this circuit in the lab →
What you need
- 4× D flip-flop: Q3 to Q0, on one clock
- 3× XOR: the toggle logic for Q1, Q2 and Q3
- 2× AND: Q1 Q0 and Q2 Q1 Q0, the toggle conditions
- 2× AND: detecting 11: Q3 AND Q1 AND Q0
- 1× OR: reset = CLR OR count is 11
- 2× NOT: NOT Q0 and NOT reset
- 4× AND: each D gated by NOT reset
Step by step
- Place a clock
CLK, an inputCLR, four D flip-flops and probesQ3toQ0. - Build a 4-bit synchronous counter: D0 = NOT Q0, D1 = Q1 XOR Q0, D2 = Q2 XOR Q1 Q0, D3 = Q3 XOR Q2 Q1 Q0.
- Detect 11 with Q3 AND Q1 AND Q0, OR it with CLR, and AND each D with the inverse of that, so the next state after 11 is 0000.
- Turn CLR off and watch the count run 0 to 11 and wrap.
Mod-12 count sequence
| Count | Q3 Q2 Q1 Q0 | Next |
|---|---|---|
| 0 | 0000 | 1 |
| 1 | 0001 | 2 |
| 2 | 0010 | 3 |
| 3 | 0011 | 4 |
| 4 | 0100 | 5 |
| 5 | 0101 | 6 |
| 6 | 0110 | 7 |
| 7 | 0111 | 8 |
| 8 | 1000 | 9 |
| 9 | 1001 | 10 |
| 10 | 1010 | 11 |
| 11 | 1011 | 0 |
Before the page is built, a 20-clock run (a clear, the full count and its wrap, more counting, a second clear) is checked on all four outputs after every clock.
You can also read the full theory in the lesson on counters. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
More builds: Registers and counters
All 246 build guides, by topic
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the Mod-12 counter in the lab →Frequently asked
How many flip-flops are needed for a mod 12 counter?
Four, since three flip-flops only reach 8 states and four reach 16, enough for 12.
How do you design a mod 12 counter?
Take a 4-bit counter and make it return to 0 after 11: detect 1011 (Q3 AND Q1 AND Q0 is enough, because 12 to 15 never occur) and use it to clear the counter, synchronously at the next clock or with an asynchronous clear.
What is a mod 12 counter used for?
Counting hours on a 12-hour clock, dividing a clock frequency by 12, and any sequence that repeats every twelve steps.